diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-12-09 13:49:58 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-01-15 15:13:09 -1000 |
| commit | d03f140804b345a85973976506492027f703d82d (patch) | |
| tree | b3b857676f34fee62326a8d409bee60781e7e013 /include/exec/cpu_ldst.h | |
| parent | 208b2d24205a103533dcde74e7ce24176bc70c5b (diff) | |
cputlb: Move body of cpu_ldst_template.h out of line
With the tracing hooks, the inline functions are no longer
so simple. Once out-of-line, the current tlb_entry lookup
is redundant with the one in the main load/store_helper.
This also begins the introduction of a new target facing
interface, with suffix *_mmuidx_ra. This is not yet
official because the interface is not done for user-only.
Use abi_ptr instead of target_ulong in preparation for
user-only; the two types are identical for softmmu.
What remains in cpu_ldst_template.h are the expansions
for _code, _data, and MMU_MODE<N>_SUFFIX.
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec/cpu_ldst.h')
| -rw-r--r-- | include/exec/cpu_ldst.h | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index fd499f7e2f..cf8af36dbc 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -152,7 +152,7 @@ static inline void clear_helper_retaddr(void) #else -/* The memory helpers for tcg-generated code need tcg_target_long etc. */ +/* Needed for TCG_OVERSIZED_GUEST */ #include "tcg.h" static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry) @@ -185,6 +185,29 @@ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)]; } +uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, + int mmu_idx, uintptr_t retaddr); + #ifdef MMU_MODE0_SUFFIX #define CPU_MMU_INDEX 0 #define MEMSUFFIX MMU_MODE0_SUFFIX |