aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorNicholas Piggin <npiggin@gmail.com>2023-05-16 02:19:53 +1000
committerNicholas Piggin <npiggin@gmail.com>2024-03-13 02:47:04 +1000
commit4b8732fce9cec7703b49543d612b6e654e0452dd (patch)
tree52f4322562bc27f2258a3b92a0e70dcd7f41f668 /hw
parent8f054d9ee8255434f0fe59955e82a13b45482a27 (diff)
target/ppc: POWER10 does not have transactional memory
POWER10 hardware implements a degenerate transactional memory facility in POWER8/9 PCR compatibility modes to permit migration from older CPUs, but POWER10 / ISA v3.1 mode does not support it so the CPU model should not support it. Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw')
0 files changed, 0 insertions, 0 deletions