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authorPeter Maydell <peter.maydell@linaro.org>2011-09-17 19:51:48 +0100
committerAndrzej Zaborowski <andrew.zaborowski@intel.com>2011-09-23 08:36:36 +0200
commit7196345549474719eb85c675174ce3717adf771b (patch)
treebe51621cca94f50c6a04276ea54724c7fa49a2a2 /hw
parentd85a1302a91912c52cdc3fe459b313848a8a0792 (diff)
hw/omap_gpmc: Add comment about FIFOTHRESHOLDSTATUS bit
Promote the remark about why we handle FIFOTHRESHOLDSTATUS the way we do from the commit message of de8af7fe0 to a comment in the code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/omap_gpmc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c
index 02f0c52107..e27b93c9b5 100644
--- a/hw/omap_gpmc.c
+++ b/hw/omap_gpmc.c
@@ -569,6 +569,13 @@ static uint64_t omap_gpmc_read(void *opaque, target_phys_addr_t addr,
case 0x1ec: /* GPMC_PREFETCH_CONTROL */
return s->prefetch.startengine;
case 0x1f0: /* GPMC_PREFETCH_STATUS */
+ /* NB: The OMAP3 TRM is inconsistent about whether the GPMC
+ * FIFOTHRESHOLDSTATUS bit should be set when
+ * FIFOPOINTER > FIFOTHRESHOLD or when it is >= FIFOTHRESHOLD.
+ * Apparently the underlying functional spec from which the TRM was
+ * created states that the behaviour is ">=", and this also
+ * makes more conceptual sense.
+ */
return (s->prefetch.fifopointer << 24) |
((s->prefetch.fifopointer >=
((s->prefetch.config1 >> 8) & 0x7f) ? 1 : 0) << 16) |