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authorNicholas Piggin <npiggin@gmail.com>2024-07-11 18:37:25 +1000
committerNicholas Piggin <npiggin@gmail.com>2024-07-26 09:21:06 +1000
commit27f61d1b0b708b4659894cd0677f65ebed6eaa0b (patch)
tree1b9b85a8ff95718741994fe3cd244d7ebbd51912 /hw
parentcf0eb929e59cb9074db7b197bb6782a2a47dddda (diff)
ppc/pnv: Implement big-core PVR for Power9/10
Power9/10 CPUs have PVR[51] set in small-core mode and clear in big-core mode. This is used by skiboot firmware. PVR is not hypervisor-privileged but it is not so important that spapr to implement this because it's generally masked out of PVR matching code in kernels, and only used by firmware. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/pnv_core.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 6dc05534d7..43cfeaa2d4 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -58,6 +58,10 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
env->nip = 0x10;
env->msr |= MSR_HVB; /* Hypervisor mode */
env->spr[SPR_HRMOR] = pc->hrmor;
+ if (pc->big_core) {
+ /* Clear "small core" bit on Power9/10 (this is set in default PVR) */
+ env->spr[SPR_PVR] &= ~PPC_BIT(51);
+ }
hreg_compute_hflags(env);
ppc_maybe_interrupt(env);