diff options
| author | Anthony Liguori <anthony@codemonkey.ws> | 2013-08-26 09:19:50 -0500 |
|---|---|---|
| committer | Anthony Liguori <anthony@codemonkey.ws> | 2013-08-26 09:19:50 -0500 |
| commit | f7ad538e1ea130c8b6f3abb06ad6c856242c799e (patch) | |
| tree | beed9203bd5083d854c4628eb0c9c29518f77d67 /hw | |
| parent | e3f024aec29a2e3eff46138687e2ecba7631c645 (diff) | |
| parent | b10577df13fa4a1b38ea6c1ea7b66c6dfd90a07a (diff) | |
Merge remote-tracking branch 'stefanha/block' into staging
# By Alex Bligh (32) and others
# Via Stefan Hajnoczi
* stefanha/block: (42 commits)
win32-aio: drop win32_aio_flush_cb()
aio-win32: replace incorrect AioHandler->opaque usage with ->e
aio / timers: remove dummy_io_handler_flush from tests/test-aio.c
aio / timers: Remove legacy interface
aio / timers: Switch entire codebase to the new timer API
aio / timers: Add scripts/switch-timer-api
aio / timers: Add test harness for AioContext timers
aio / timers: convert block_job_sleep_ns and co_sleep_ns to new API
aio / timers: Convert rtc_clock to be a QEMUClockType
aio / timers: Remove main_loop_timerlist
aio / timers: Rearrange timer.h & make legacy functions call non-legacy
aio / timers: Add qemu_clock_get_ms and qemu_clock_get_ms
aio / timers: Remove legacy qemu_clock_deadline & qemu_timerlist_deadline
aio / timers: Remove alarm timers
aio / timers: Add documentation and new format calls
aio / timers: Use all timerlists in icount warp calculations
aio / timers: Introduce new API timer_new and friends
aio / timers: On timer modification, qemu_notify or aio_notify
aio / timers: Convert mainloop to use timeout
aio / timers: Convert aio_poll to use AioContext timers' deadline
...
Message-id: 1377202298-22896-1-git-send-email-stefanha@redhat.com
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Diffstat (limited to 'hw')
99 files changed, 617 insertions, 596 deletions
diff --git a/hw/acpi/core.c b/hw/acpi/core.c index b07fedac59..7467b88e27 100644 --- a/hw/acpi/core.c +++ b/hw/acpi/core.c @@ -433,9 +433,9 @@ void acpi_pm_tmr_update(ACPIREGS *ar, bool enable) if (enable) { expire_time = muldiv64(ar->tmr.overflow_time, get_ticks_per_sec(), PM_TIMER_FREQUENCY); - qemu_mod_timer(ar->tmr.timer, expire_time); + timer_mod(ar->tmr.timer, expire_time); } else { - qemu_del_timer(ar->tmr.timer); + timer_del(ar->tmr.timer); } } @@ -481,7 +481,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, MemoryRegion *parent) { ar->tmr.update_sci = update_sci; - ar->tmr.timer = qemu_new_timer_ns(vm_clock, acpi_pm_tmr_timer, ar); + ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), &acpi_pm_tmr_ops, ar, "acpi-tmr", 4); memory_region_add_subregion(parent, 8, &ar->tmr.io); @@ -490,7 +490,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, void acpi_pm_tmr_reset(ACPIREGS *ar) { ar->tmr.overflow_time = 0; - qemu_del_timer(ar->tmr.timer); + timer_del(ar->tmr.timer); } /* ACPI PM1aCNT */ diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index c88569061c..613d98736a 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -263,7 +263,7 @@ static int acpi_load_old(QEMUFile *f, void *opaque, int version_id) return ret; } - qemu_get_timer(f, s->ar.tmr.timer); + timer_get(f, s->ar.tmr.timer); qemu_get_sbe64s(f, &s->ar.tmr.overflow_time); qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 245004530c..aac9a32e0c 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -833,7 +833,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, AlphaCPU *cpu = cpus[i]; s->cchip.cpu[i] = cpu; if (cpu != NULL) { - cpu->alarm_timer = qemu_new_timer_ns(vm_clock, + cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, typhoon_alarm_timer, (void *)((uintptr_t)s + i)); } diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index b6a0b27b02..47511d2cae 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -99,7 +99,7 @@ struct omap_mpu_timer_s { static inline uint32_t omap_timer_read(struct omap_mpu_timer_s *timer) { - uint64_t distance = qemu_get_clock_ns(vm_clock) - timer->time; + uint64_t distance = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - timer->time; if (timer->st && timer->enable && timer->rate) return timer->val - muldiv64(distance >> (timer->ptv + 1), @@ -111,7 +111,7 @@ static inline uint32_t omap_timer_read(struct omap_mpu_timer_s *timer) static inline void omap_timer_sync(struct omap_mpu_timer_s *timer) { timer->val = omap_timer_read(timer); - timer->time = qemu_get_clock_ns(vm_clock); + timer->time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } static inline void omap_timer_update(struct omap_mpu_timer_s *timer) @@ -130,11 +130,11 @@ static inline void omap_timer_update(struct omap_mpu_timer_s *timer) * in a busy loop when it wants to sleep just a couple of CPU * ticks. */ if (expires > (get_ticks_per_sec() >> 10) || timer->ar) - qemu_mod_timer(timer->timer, timer->time + expires); + timer_mod(timer->timer, timer->time + expires); else qemu_bh_schedule(timer->tick); } else - qemu_del_timer(timer->timer); + timer_del(timer->timer); } static void omap_timer_fire(void *opaque) @@ -240,7 +240,7 @@ static const MemoryRegionOps omap_mpu_timer_ops = { static void omap_mpu_timer_reset(struct omap_mpu_timer_s *s) { - qemu_del_timer(s->timer); + timer_del(s->timer); s->enable = 0; s->reset_val = 31337; s->val = 0; @@ -259,7 +259,7 @@ static struct omap_mpu_timer_s *omap_mpu_timer_init(MemoryRegion *system_memory, s->irq = irq; s->clk = clk; - s->timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_timer_tick, s); s->tick = qemu_bh_new(omap_timer_fire, s); omap_mpu_timer_reset(s); omap_timer_clk_setup(s); @@ -363,7 +363,7 @@ static const MemoryRegionOps omap_wd_timer_ops = { static void omap_wd_timer_reset(struct omap_watchdog_timer_s *s) { - qemu_del_timer(s->timer.timer); + timer_del(s->timer.timer); if (!s->mode) omap_clk_get(s->timer.clk); s->mode = 1; @@ -388,7 +388,7 @@ static struct omap_watchdog_timer_s *omap_wd_timer_init(MemoryRegion *memory, s->timer.irq = irq; s->timer.clk = clk; - s->timer.timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, &s->timer); + s->timer.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_timer_tick, &s->timer); omap_wd_timer_reset(s); omap_timer_clk_setup(&s->timer); @@ -475,7 +475,7 @@ static const MemoryRegionOps omap_os_timer_ops = { static void omap_os_timer_reset(struct omap_32khz_timer_s *s) { - qemu_del_timer(s->timer.timer); + timer_del(s->timer.timer); s->timer.enable = 0; s->timer.it_ena = 0; s->timer.reset_val = 0x00ffffff; @@ -494,7 +494,7 @@ static struct omap_32khz_timer_s *omap_os_timer_init(MemoryRegion *memory, s->timer.irq = irq; s->timer.clk = clk; - s->timer.timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, &s->timer); + s->timer.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_timer_tick, &s->timer); omap_os_timer_reset(s); omap_timer_clk_setup(&s->timer); @@ -600,7 +600,7 @@ static void omap_ulpd_pm_write(void *opaque, hwaddr addr, case 0x10: /* GAUGING_CTRL */ /* Bits 0 and 1 seem to be confused in the OMAP 310 TRM */ if ((s->ulpd_pm_regs[addr >> 2] ^ value) & 1) { - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (value & 1) s->ulpd_gauge_start = now; @@ -2881,7 +2881,7 @@ static void omap_rtc_tick(void *opaque) if (s->auto_comp && !s->current_tm.tm_sec && !s->current_tm.tm_min) s->tick += s->comp_reg * 1000 / 32768; - qemu_mod_timer(s->clk, s->tick); + timer_mod(s->clk, s->tick); } static void omap_rtc_reset(struct omap_rtc_s *s) @@ -2894,7 +2894,7 @@ static void omap_rtc_reset(struct omap_rtc_s *s) s->pm_am = 0; s->auto_comp = 0; s->round = 0; - s->tick = qemu_get_clock_ms(rtc_clock); + s->tick = qemu_clock_get_ms(rtc_clock); memset(&s->alarm_tm, 0, sizeof(s->alarm_tm)); s->alarm_tm.tm_mday = 0x01; s->status = 1 << 7; @@ -2915,7 +2915,7 @@ static struct omap_rtc_s *omap_rtc_init(MemoryRegion *system_memory, s->irq = timerirq; s->alarm = alarmirq; - s->clk = qemu_new_timer_ms(rtc_clock, omap_rtc_tick, s); + s->clk = timer_new_ms(rtc_clock, omap_rtc_tick, s); omap_rtc_reset(s); @@ -3009,7 +3009,7 @@ static void omap_mcbsp_source_tick(void *opaque) s->rx_req = s->rx_rate << bps[(s->rcr[0] >> 5) & 7]; omap_mcbsp_rx_newdata(s); - qemu_mod_timer(s->source_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(s->source_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec()); } @@ -3025,7 +3025,7 @@ static void omap_mcbsp_rx_start(struct omap_mcbsp_s *s) static void omap_mcbsp_rx_stop(struct omap_mcbsp_s *s) { - qemu_del_timer(s->source_timer); + timer_del(s->source_timer); } static void omap_mcbsp_rx_done(struct omap_mcbsp_s *s) @@ -3055,7 +3055,7 @@ static void omap_mcbsp_sink_tick(void *opaque) s->tx_req = s->tx_rate << bps[(s->xcr[0] >> 5) & 7]; omap_mcbsp_tx_newdata(s); - qemu_mod_timer(s->sink_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(s->sink_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec()); } @@ -3082,7 +3082,7 @@ static void omap_mcbsp_tx_stop(struct omap_mcbsp_s *s) { s->tx_req = 0; omap_mcbsp_tx_done(s); - qemu_del_timer(s->sink_timer); + timer_del(s->sink_timer); } static void omap_mcbsp_req_update(struct omap_mcbsp_s *s) @@ -3432,8 +3432,8 @@ static void omap_mcbsp_reset(struct omap_mcbsp_s *s) s->rx_req = 0; s->tx_rate = 0; s->rx_rate = 0; - qemu_del_timer(s->source_timer); - qemu_del_timer(s->sink_timer); + timer_del(s->source_timer); + timer_del(s->sink_timer); } static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, @@ -3448,8 +3448,8 @@ static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, s->rxirq = rxirq; s->txdrq = dma[0]; s->rxdrq = dma[1]; - s->sink_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_sink_tick, s); - s->source_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_source_tick, s); + s->sink_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_mcbsp_sink_tick, s); + s->source_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_mcbsp_source_tick, s); omap_mcbsp_reset(s); memory_region_init_io(&s->iomem, NULL, &omap_mcbsp_ops, s, "omap-mcbsp", 0x800); @@ -3503,9 +3503,9 @@ static void omap_lpg_tick(void *opaque) struct omap_lpg_s *s = opaque; if (s->cycle) - qemu_mod_timer(s->tm, qemu_get_clock_ms(vm_clock) + s->period - s->on); + timer_mod(s->tm, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + s->period - s->on); else - qemu_mod_timer(s->tm, qemu_get_clock_ms(vm_clock) + s->on); + timer_mod(s->tm, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + s->on); s->cycle = !s->cycle; printf("%s: LED is %s\n", __FUNCTION__, s->cycle ? "on" : "off"); @@ -3527,7 +3527,7 @@ static void omap_lpg_update(struct omap_lpg_s *s) per[(s->control >> 3) & 7], 256) : 0; /* ONCTRL */ } - qemu_del_timer(s->tm); + timer_del(s->tm); if (on == period && s->on < s->period) printf("%s: LED is on\n", __FUNCTION__); else if (on == 0 && s->on) @@ -3623,7 +3623,7 @@ static struct omap_lpg_s *omap_lpg_init(MemoryRegion *system_memory, struct omap_lpg_s *s = (struct omap_lpg_s *) g_malloc0(sizeof(struct omap_lpg_s)); - s->tm = qemu_new_timer_ms(vm_clock, omap_lpg_tick, s); + s->tm = timer_new_ms(QEMU_CLOCK_VIRTUAL, omap_lpg_tick, s); omap_lpg_reset(s); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 17ddd3fab8..02b7016a04 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -335,7 +335,7 @@ static int pxa2xx_cpccnt_read(CPUARMState *env, const ARMCPRegInfo *ri, { PXA2xxState *s = (PXA2xxState *)ri->opaque; if (s->pmnc & 1) { - *value = qemu_get_clock_ns(vm_clock); + *value = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } else { *value = 0; } @@ -842,7 +842,7 @@ static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s) static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s) { - int64_t rt = qemu_get_clock_ms(rtc_clock); + int64_t rt = qemu_clock_get_ms(rtc_clock); s->last_rcnr += ((rt - s->last_hz) << 15) / (1000 * ((s->rttr & 0xffff) + 1)); s->last_rdcr += ((rt - s->last_hz) << 15) / @@ -852,7 +852,7 @@ static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s) static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s) { - int64_t rt = qemu_get_clock_ms(rtc_clock); + int64_t rt = qemu_clock_get_ms(rtc_clock); if (s->rtsr & (1 << 12)) s->last_swcr += (rt - s->last_sw) / 10; s->last_sw = rt; @@ -860,7 +860,7 @@ static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s) static void pxa2xx_rtc_piupdate(PXA2xxRTCState *s) { - int64_t rt = qemu_get_clock_ms(rtc_clock); + int64_t rt = qemu_clock_get_ms(rtc_clock); if (s->rtsr & (1 << 15)) s->last_swcr += rt - s->last_pi; s->last_pi = rt; @@ -870,43 +870,43 @@ static inline void pxa2xx_rtc_alarm_update(PXA2xxRTCState *s, uint32_t rtsr) { if ((rtsr & (1 << 2)) && !(rtsr & (1 << 0))) - qemu_mod_timer(s->rtc_hz, s->last_hz + + timer_mod(s->rtc_hz, s->last_hz + (((s->rtar - s->last_rcnr) * 1000 * ((s->rttr & 0xffff) + 1)) >> 15)); else - qemu_del_timer(s->rtc_hz); + timer_del(s->rtc_hz); if ((rtsr & (1 << 5)) && !(rtsr & (1 << 4))) - qemu_mod_timer(s->rtc_rdal1, s->last_hz + + timer_mod(s->rtc_rdal1, s->last_hz + (((s->rdar1 - s->last_rdcr) * 1000 * ((s->rttr & 0xffff) + 1)) >> 15)); /* TODO: fixup */ else - qemu_del_timer(s->rtc_rdal1); + timer_del(s->rtc_rdal1); if ((rtsr & (1 << 7)) && !(rtsr & (1 << 6))) - qemu_mod_timer(s->rtc_rdal2, s->last_hz + + timer_mod(s->rtc_rdal2, s->last_hz + (((s->rdar2 - s->last_rdcr) * 1000 * ((s->rttr & 0xffff) + 1)) >> 15)); /* TODO: fixup */ else - qemu_del_timer(s->rtc_rdal2); + timer_del(s->rtc_rdal2); if ((rtsr & 0x1200) == 0x1200 && !(rtsr & (1 << 8))) - qemu_mod_timer(s->rtc_swal1, s->last_sw + + timer_mod(s->rtc_swal1, s->last_sw + (s->swar1 - s->last_swcr) * 10); /* TODO: fixup */ else - qemu_del_timer(s->rtc_swal1); + timer_del(s->rtc_swal1); if ((rtsr & 0x1800) == 0x1800 && !(rtsr & (1 << 10))) - qemu_mod_timer(s->rtc_swal2, s->last_sw + + timer_mod(s->rtc_swal2, s->last_sw + (s->swar2 - s->last_swcr) * 10); /* TODO: fixup */ else - qemu_del_timer(s->rtc_swal2); + timer_del(s->rtc_swal2); if ((rtsr & 0xc000) == 0xc000 && !(rtsr & (1 << 13))) - qemu_mod_timer(s->rtc_pi, s->last_pi + + timer_mod(s->rtc_pi, s->last_pi + (s->piar & 0xffff) - s->last_rtcpicr); else - qemu_del_timer(s->rtc_pi); + timer_del(s->rtc_pi); } static inline void pxa2xx_rtc_hz_tick(void *opaque) @@ -986,16 +986,19 @@ static uint64_t pxa2xx_rtc_read(void *opaque, hwaddr addr, case PIAR: return s->piar; case RCNR: - return s->last_rcnr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) / - (1000 * ((s->rttr & 0xffff) + 1)); + return s->last_rcnr + + ((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) / + (1000 * ((s->rttr & 0xffff) + 1)); case RDCR: - return s->last_rdcr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) / - (1000 * ((s->rttr & 0xffff) + 1)); + return s->last_rdcr + + ((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) / + (1000 * ((s->rttr & 0xffff) + 1)); case RYCR: return s->last_rycr; case SWCR: if (s->rtsr & (1 << 12)) - return s->last_swcr + (qemu_get_clock_ms(rtc_clock) - s->last_sw) / 10; + return s->last_swcr + + (qemu_clock_get_ms(rtc_clock) - s->last_sw) / 10; else return s->last_swcr; default: @@ -1135,14 +1138,14 @@ static int pxa2xx_rtc_init(SysBusDevice *dev) s->last_swcr = (tm.tm_hour << 19) | (tm.tm_min << 13) | (tm.tm_sec << 7); s->last_rtcpicr = 0; - s->last_hz = s->last_sw = s->last_pi = qemu_get_clock_ms(rtc_clock); - - s->rtc_hz = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_hz_tick, s); - s->rtc_rdal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s); - s->rtc_rdal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s); - s->rtc_swal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s); - s->rtc_swal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s); - s->rtc_pi = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_pi_tick, s); + s->last_hz = s->last_sw = s->last_pi = qemu_clock_get_ms(rtc_clock); + + s->rtc_hz = timer_new_ms(rtc_clock, pxa2xx_rtc_hz_tick, s); + s->rtc_rdal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s); + s->rtc_rdal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s); + s->rtc_swal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s); + s->rtc_swal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s); + s->rtc_pi = timer_new_ms(rtc_clock, pxa2xx_rtc_pi_tick, s); sysbus_init_irq(dev, &s->rtc_irq); diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 34f958268d..9b9ce95c5a 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -393,7 +393,7 @@ static void spitz_keyboard_tick(void *opaque) s->fifopos = 0; } - qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) + + timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec() / 32); } @@ -485,7 +485,7 @@ static void spitz_keyboard_register(PXA2xxState *cpu) qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], qdev_get_gpio_in(dev, i)); - qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock)); + timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); qemu_add_kbd_event_handler(spitz_keyboard_handler, s); } @@ -505,7 +505,7 @@ static int spitz_keyboard_init(SysBusDevice *sbd) spitz_keyboard_pre_map(s); - s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s); + s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 79f6b4e310..3237b30260 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -78,14 +78,14 @@ static void gptm_update_irq(gptm_state *s) static void gptm_stop(gptm_state *s, int n) { - qemu_del_timer(s->timer[n]); + timer_del(s->timer[n]); } static void gptm_reload(gptm_state *s, int n, int reset) { int64_t tick; if (reset) - tick = qemu_get_clock_ns(vm_clock); + tick = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); else tick = s->tick[n]; @@ -103,7 +103,7 @@ static void gptm_reload(gptm_state *s, int n, int reset) hw_error("TODO: 16-bit timer mode 0x%x\n", s->mode[n]); } s->tick[n] = tick; - qemu_mod_timer(s->timer[n], tick); + timer_mod(s->timer[n], tick); } static void gptm_tick(void *opaque) @@ -318,8 +318,8 @@ static int stellaris_gptm_init(SysBusDevice *sbd) sysbus_init_mmio(sbd, &s->iomem); s->opaque[0] = s->opaque[1] = s; - s->timer[0] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[0]); - s->timer[1] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[1]); + s->timer[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, gptm_tick, &s->opaque[0]); + s->timer[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, gptm_tick, &s->opaque[1]); vmstate_register(dev, -1, &vmstate_stellaris_gptm, s); return 0; } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 7b8ef8cbeb..170d0ce267 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -269,7 +269,7 @@ static inline void strongarm_rtc_int_update(StrongARMRTCState *s) static void strongarm_rtc_hzupdate(StrongARMRTCState *s) { - int64_t rt = qemu_get_clock_ms(rtc_clock); + int64_t rt = qemu_clock_get_ms(rtc_clock); s->last_rcnr += ((rt - s->last_hz) << 15) / (1000 * ((s->rttr & 0xffff) + 1)); s->last_hz = rt; @@ -278,17 +278,17 @@ static void strongarm_rtc_hzupdate(StrongARMRTCState *s) static inline void strongarm_rtc_timer_update(StrongARMRTCState *s) { if ((s->rtsr & RTSR_HZE) && !(s->rtsr & RTSR_HZ)) { - qemu_mod_timer(s->rtc_hz, s->last_hz + 1000); + timer_mod(s->rtc_hz, s->last_hz + 1000); } else { - qemu_del_timer(s->rtc_hz); + timer_del(s->rtc_hz); } if ((s->rtsr & RTSR_ALE) && !(s->rtsr & RTSR_AL)) { - qemu_mod_timer(s->rtc_alarm, s->last_hz + + timer_mod(s->rtc_alarm, s->last_hz + (((s->rtar - s->last_rcnr) * 1000 * ((s->rttr & 0xffff) + 1)) >> 15)); } else { - qemu_del_timer(s->rtc_alarm); + timer_del(s->rtc_alarm); } } @@ -322,7 +322,7 @@ static uint64_t strongarm_rtc_read(void *opaque, hwaddr addr, return s->rtar; case RCNR: return s->last_rcnr + - ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) / + ((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) / (1000 * ((s->rttr & 0xffff) + 1)); default: printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr); @@ -388,10 +388,10 @@ static int strongarm_rtc_init(SysBusDevice *dev) qemu_get_timedate(&tm, 0); s->last_rcnr = (uint32_t) mktimegm(&tm); - s->last_hz = qemu_get_clock_ms(rtc_clock); + s->last_hz = qemu_clock_get_ms(rtc_clock); - s->rtc_alarm = qemu_new_timer_ms(rtc_clock, strongarm_rtc_alarm_tick, s); - s->rtc_hz = qemu_new_timer_ms(rtc_clock, strongarm_rtc_hz_tick, s); + s->rtc_alarm = timer_new_ms(rtc_clock, strongarm_rtc_alarm_tick, s); + s->rtc_hz = timer_new_ms(rtc_clock, strongarm_rtc_hz_tick, s); sysbus_init_irq(dev, &s->rtc_irq); sysbus_init_irq(dev, &s->rtc_hz_irq); @@ -1085,8 +1085,8 @@ static void strongarm_uart_receive(void *opaque, const uint8_t *buf, int size) } /* call the timeout receive callback in 3 char transmit time */ - qemu_mod_timer(s->rx_timeout_timer, - qemu_get_clock_ns(vm_clock) + s->char_transmit_time * 3); + timer_mod(s->rx_timeout_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time * 3); strongarm_uart_update_status(s); strongarm_uart_update_int_status(s); @@ -1107,7 +1107,7 @@ static void strongarm_uart_event(void *opaque, int event) static void strongarm_uart_tx(void *opaque) { StrongARMUARTState *s = opaque; - uint64_t new_xmit_ts = qemu_get_clock_ns(vm_clock); + uint64_t new_xmit_ts = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (s->utcr3 & UTCR3_LBM) /* loopback */ { strongarm_uart_receive(s, &s->tx_fifo[s->tx_start], 1); @@ -1118,7 +1118,7 @@ static void strongarm_uart_tx(void *opaque) s->tx_start = (s->tx_start + 1) % 8; s->tx_len--; if (s->tx_len) { - qemu_mod_timer(s->tx_timer, new_xmit_ts + s->char_transmit_time); + timer_mod(s->tx_timer, new_xmit_ts + s->char_transmit_time); } strongarm_uart_update_status(s); strongarm_uart_update_int_status(s); @@ -1237,8 +1237,8 @@ static int strongarm_uart_init(SysBusDevice *dev) sysbus_init_mmio(dev, &s->iomem); sysbus_init_irq(dev, &s->irq); - s->rx_timeout_timer = qemu_new_timer_ns(vm_clock, strongarm_uart_rx_to, s); - s->tx_timer = qemu_new_timer_ns(vm_clock, strongarm_uart_tx, s); + s->rx_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_rx_to, s); + s->tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_tx, s); if (s->chr) { qemu_chr_add_handlers(s->chr, @@ -1282,8 +1282,8 @@ static int strongarm_uart_post_load(void *opaque, int version_id) /* restart rx timeout timer */ if (s->rx_len) { - qemu_mod_timer(s->rx_timeout_timer, - qemu_get_clock_ns(vm_clock) + s->char_transmit_time * 3); + timer_mod(s->rx_timeout_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time * 3); } return 0; diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index 0421d473ff..0c792475d1 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -173,7 +173,7 @@ static void timer_handler (int c, double interval_Sec) s->ticking[n] = 1; #ifdef DEBUG interval = get_ticks_per_sec () * interval_Sec; - exp = qemu_get_clock_ns (vm_clock) + interval; + exp = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + interval; s->exp[n] = exp; #endif diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 32e44adb53..78f9d282e0 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -526,7 +526,7 @@ static void intel_hda_get_wall_clk(IntelHDAState *d, const IntelHDAReg *reg) { int64_t ns; - ns = qemu_get_clock_ns(vm_clock) - d->wall_base_ns; + ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - d->wall_base_ns; d->wall_clk = (uint32_t)(ns * 24 / 1000); /* 24 MHz */ } @@ -1111,7 +1111,7 @@ static void intel_hda_reset(DeviceState *dev) HDACodecDevice *cdev; intel_hda_regs_reset(d); - d->wall_base_ns = qemu_get_clock_ns(vm_clock); + d->wall_base_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* reset codecs */ QTAILQ_FOREACH(kid, &d->codecs.qbus.children, sibling) { diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index 3e586888eb..db79131cf1 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -768,9 +768,9 @@ static void complete (SB16State *s) } else { if (s->aux_ts) { - qemu_mod_timer ( + timer_mod ( s->aux_ts, - qemu_get_clock_ns (vm_clock) + ticks + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ticks ); } } @@ -1378,7 +1378,7 @@ static void sb16_realizefn (DeviceState *dev, Error **errp) s->csp_regs[9] = 0xf8; reset_mixer (s); - s->aux_ts = qemu_new_timer_ns (vm_clock, aux_timer, s); + s->aux_ts = timer_new_ns(QEMU_CLOCK_VIRTUAL, aux_timer, s); if (!s->aux_ts) { dolog ("warning: Could not create auxiliary timer\n"); } diff --git a/hw/block/fdc.c b/hw/block/fdc.c index e35ed2eabb..c5a6c21215 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -1647,8 +1647,8 @@ static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction) FDrive *cur_drv = get_cur_drv(fdctrl); cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; - qemu_mod_timer(fdctrl->result_timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 50)); + timer_mod(fdctrl->result_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 50)); } static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction) @@ -2108,7 +2108,7 @@ static void fdctrl_realize_common(FDCtrl *fdctrl, Error **errp) FLOPPY_DPRINTF("init controller\n"); fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN); fdctrl->fifo_size = 512; - fdctrl->result_timer = qemu_new_timer_ns(vm_clock, + fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, fdctrl_result_timer, fdctrl); fdctrl->version = 0x90; /* Intel 82078 controller */ diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 0263e5c636..5dee229734 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -187,7 +187,7 @@ static void nvme_enqueue_req_completion(NvmeCQueue *cq, NvmeRequest *req) assert(cq->cqid == req->sq->cqid); QTAILQ_REMOVE(&req->sq->out_req_list, req, entry); QTAILQ_INSERT_TAIL(&cq->req_list, req, entry); - qemu_mod_timer(cq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(cq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } static void nvme_rw_cb(void *opaque, int ret) @@ -264,8 +264,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req) static void nvme_free_sq(NvmeSQueue *sq, NvmeCtrl *n) { n->sq[sq->sqid] = NULL; - qemu_del_timer(sq->timer); - qemu_free_timer(sq->timer); + timer_del(sq->timer); + timer_free(sq->timer); g_free(sq->io_req); if (sq->sqid) { g_free(sq); @@ -327,7 +327,7 @@ static void nvme_init_sq(NvmeSQueue *sq, NvmeCtrl *n, uint64_t dma_addr, sq->io_req[i].sq = sq; QTAILQ_INSERT_TAIL(&(sq->req_list), &sq->io_req[i], entry); } - sq->timer = qemu_new_timer_ns(vm_clock, nvme_process_sq, sq); + sq->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, nvme_process_sq, sq); assert(n->cq[cqid]); cq = n->cq[cqid]; @@ -369,8 +369,8 @@ static uint16_t nvme_create_sq(NvmeCtrl *n, NvmeCmd *cmd) static void nvme_free_cq(NvmeCQueue *cq, NvmeCtrl *n) { n->cq[cq->cqid] = NULL; - qemu_del_timer(cq->timer); - qemu_free_timer(cq->timer); + timer_del(cq->timer); + timer_free(cq->timer); msix_vector_unuse(&n->parent_obj, cq->vector); if (cq->cqid) { g_free(cq); @@ -410,7 +410,7 @@ static void nvme_init_cq(NvmeCQueue *cq, NvmeCtrl *n, uint64_t dma_addr, QTAILQ_INIT(&cq->sq_list); msix_vector_use(&n->parent_obj, cq->vector); n->cq[cqid] = cq; - cq->timer = qemu_new_timer_ns(vm_clock, nvme_post_cqes, cq); + cq->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, nvme_post_cqes, cq); } static uint16_t nvme_create_cq(NvmeCtrl *n, NvmeCmd *cmd) @@ -691,9 +691,9 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr, int val) if (start_sqs) { NvmeSQueue *sq; QTAILQ_FOREACH(sq, &cq->sq_list, entry) { - qemu_mod_timer(sq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(sq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } - qemu_mod_timer(cq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(cq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } if (cq->tail != cq->head) { @@ -714,7 +714,7 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr, int val) } sq->tail = new_tail; - qemu_mod_timer(sq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(sq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } } diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 825011d8cb..018a9677ba 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -613,7 +613,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) pfl->ro = 0; } - pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); + pfl->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->wcycle = 0; pfl->cmd = 0; pfl->status = 0; diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 9fc02e3d64..99445b09b9 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -430,8 +430,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, } pfl->status = 0x00; /* Let's wait 5 seconds before chip erase is done */ - qemu_mod_timer(pfl->timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() * 5)); + timer_mod(pfl->timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() * 5)); break; case 0x30: /* Sector erase */ @@ -445,8 +445,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, } pfl->status = 0x00; /* Let's wait 1/2 second before sector erase is done */ - qemu_mod_timer(pfl->timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 2)); + timer_mod(pfl->timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 2)); break; default: DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd); @@ -633,7 +633,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) pfl->ro = 0; } - pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); + pfl->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->wcycle = 0; pfl->cmd = 0; pfl->status = 0; diff --git a/hw/bt/hci-csr.c b/hw/bt/hci-csr.c index 16a25cb349..7b9b91608a 100644 --- a/hw/bt/hci-csr.c +++ b/hw/bt/hci-csr.c @@ -87,7 +87,7 @@ static inline void csrhci_fifo_wake(struct csrhci_s *s) } if (s->out_len) - qemu_mod_timer(s->out_tm, qemu_get_clock_ns(vm_clock) + s->baud_delay); + timer_mod(s->out_tm, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->baud_delay); } #define csrhci_out_packetz(s, len) memset(csrhci_out_packet(s, len), 0, len) @@ -446,7 +446,7 @@ CharDriverState *uart_hci_init(qemu_irq wakeup) s->hci->evt_recv = csrhci_out_hci_packet_event; s->hci->acl_recv = csrhci_out_hci_packet_acl; - s->out_tm = qemu_new_timer_ns(vm_clock, csrhci_out_tick, s); + s->out_tm = timer_new_ns(QEMU_CLOCK_VIRTUAL, csrhci_out_tick, s); s->pins = qemu_allocate_irqs(csrhci_pins, s, __csrhci_pins); csrhci_reset(s); diff --git a/hw/bt/hci.c b/hw/bt/hci.c index b53cd5dea2..d1c0604a9b 100644 --- a/hw/bt/hci.c +++ b/hw/bt/hci.c @@ -576,7 +576,7 @@ static void bt_hci_inquiry_result(struct bt_hci_s *hci, static void bt_hci_mod_timer_1280ms(QEMUTimer *timer, int period) { - qemu_mod_timer(timer, qemu_get_clock_ns(vm_clock) + + timer_mod(timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + muldiv64(period << 7, get_ticks_per_sec(), 100)); } @@ -657,7 +657,7 @@ static void bt_hci_lmp_link_establish(struct bt_hci_s *hci, if (master) { link->acl_mode = acl_active; hci->lm.handle[hci->lm.last_handle].acl_mode_timer = - qemu_new_timer_ns(vm_clock, bt_hci_mode_tick, link); + timer_new_ns(QEMU_CLOCK_VIRTUAL, bt_hci_mode_tick, link); } } @@ -667,8 +667,8 @@ static void bt_hci_lmp_link_teardown(struct bt_hci_s *hci, uint16_t handle) hci->lm.handle[handle].link = NULL; if (bt_hci_role_master(hci, handle)) { - qemu_del_timer(hci->lm.handle[handle].acl_mode_timer); - qemu_free_timer(hci->lm.handle[handle].acl_mode_timer); + timer_del(hci->lm.handle[handle].acl_mode_timer); + timer_free(hci->lm.handle[handle].acl_mode_timer); } } @@ -1080,7 +1080,7 @@ static int bt_hci_mode_change(struct bt_hci_s *hci, uint16_t handle, bt_hci_event_status(hci, HCI_SUCCESS); - qemu_mod_timer(link->acl_mode_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(link->acl_mode_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + muldiv64(interval * 625, get_ticks_per_sec(), 1000000)); bt_hci_lmp_mode_change_master(hci, link->link, mode, interval); @@ -1103,7 +1103,7 @@ static int bt_hci_mode_cancel(struct bt_hci_s *hci, uint16_t handle, int mode) bt_hci_event_status(hci, HCI_SUCCESS); - qemu_del_timer(link->acl_mode_timer); + timer_del(link->acl_mode_timer); bt_hci_lmp_mode_change_master(hci, link->link, acl_active, 0); return 0; @@ -1146,10 +1146,10 @@ static void bt_hci_reset(struct bt_hci_s *hci) hci->psb_handle = 0x000; hci->asb_handle = 0x000; - /* XXX: qemu_del_timer(sl->acl_mode_timer); for all links */ - qemu_del_timer(hci->lm.inquiry_done); - qemu_del_timer(hci->lm.inquiry_next); - qemu_del_timer(hci->conn_accept_timer); + /* XXX: timer_del(sl->acl_mode_timer); for all links */ + timer_del(hci->lm.inquiry_done); + timer_del(hci->lm.inquiry_next); + timer_del(hci->conn_accept_timer); } static void bt_hci_read_local_version_rp(struct bt_hci_s *hci) @@ -1514,7 +1514,7 @@ static void bt_submit_hci(struct HCIInfo *info, } hci->lm.inquire = 0; - qemu_del_timer(hci->lm.inquiry_done); + timer_del(hci->lm.inquiry_done); bt_hci_event_complete_status(hci, HCI_SUCCESS); break; @@ -1552,8 +1552,8 @@ static void bt_submit_hci(struct HCIInfo *info, break; } hci->lm.inquire = 0; - qemu_del_timer(hci->lm.inquiry_done); - qemu_del_timer(hci->lm.inquiry_next); + timer_del(hci->lm.inquiry_done); + timer_del(hci->lm.inquiry_next); bt_hci_event_complete_status(hci, HCI_SUCCESS); break; @@ -2141,10 +2141,10 @@ struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net) { struct bt_hci_s *s = g_malloc0(sizeof(struct bt_hci_s)); - s->lm.inquiry_done = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_done, s); - s->lm.inquiry_next = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_next, s); + s->lm.inquiry_done = timer_new_ns(QEMU_CLOCK_VIRTUAL, bt_hci_inquiry_done, s); + s->lm.inquiry_next = timer_new_ns(QEMU_CLOCK_VIRTUAL, bt_hci_inquiry_next, s); s->conn_accept_timer = - qemu_new_timer_ns(vm_clock, bt_hci_conn_accept_timeout, s); + timer_new_ns(QEMU_CLOCK_VIRTUAL, bt_hci_conn_accept_timeout, s); s->evt_packet = bt_hci_evt_packet; s->evt_submit = bt_hci_evt_submit; @@ -2209,9 +2209,9 @@ static void bt_hci_done(struct HCIInfo *info) * s->device.lmp_connection_complete to free the remaining bits once * hci->lm.awaiting_bdaddr[] is empty. */ - qemu_free_timer(hci->lm.inquiry_done); - qemu_free_timer(hci->lm.inquiry_next); - qemu_free_timer(hci->conn_accept_timer); + timer_free(hci->lm.inquiry_done); + timer_free(hci->lm.inquiry_next); + timer_free(hci->conn_accept_timer); g_free(hci); } diff --git a/hw/bt/l2cap.c b/hw/bt/l2cap.c index 521587a112..2301d6f87f 100644 --- a/hw/bt/l2cap.c +++ b/hw/bt/l2cap.c @@ -166,9 +166,9 @@ static void l2cap_retransmission_timer_update(struct l2cap_chan_s *ch) { #if 0 if (ch->mode != L2CAP_MODE_BASIC && ch->rexmit) - qemu_mod_timer(ch->retransmission_timer); + timer_mod(ch->retransmission_timer); else - qemu_del_timer(ch->retransmission_timer); + timer_del(ch->retransmission_timer); #endif } @@ -176,9 +176,9 @@ static void l2cap_monitor_timer_update(struct l2cap_chan_s *ch) { #if 0 if (ch->mode != L2CAP_MODE_BASIC && !ch->rexmit) - qemu_mod_timer(ch->monitor_timer); + timer_mod(ch->monitor_timer); else - qemu_del_timer(ch->monitor_timer); + timer_del(ch->monitor_timer); #endif } diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 3c2e96097b..f8ccbdd13a 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -141,9 +141,9 @@ static void fifo_trigger_update(void *opaque) static void uart_tx_redo(UartState *s) { - uint64_t new_tx_time = qemu_get_clock_ns(vm_clock); + uint64_t new_tx_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - qemu_mod_timer(s->tx_time_handle, new_tx_time + s->char_tx_time); + timer_mod(s->tx_time_handle, new_tx_time + s->char_tx_time); s->r[R_SR] |= UART_SR_INTR_TEMPTY; @@ -265,7 +265,7 @@ static void uart_ctrl_update(UartState *s) static void uart_write_rx_fifo(void *opaque, const uint8_t *buf, int size) { UartState *s = (UartState *)opaque; - uint64_t new_rx_time = qemu_get_clock_ns(vm_clock); + uint64_t new_rx_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); int i; if ((s->r[R_CR] & UART_CR_RX_DIS) || !(s->r[R_CR] & UART_CR_RX_EN)) { @@ -291,7 +291,7 @@ static void uart_write_rx_fifo(void *opaque, const uint8_t *buf, int size) s->r[R_SR] |= UART_SR_INTR_RTRIG; } } - qemu_mod_timer(s->fifo_trigger_handle, new_rx_time + + timer_mod(s->fifo_trigger_handle, new_rx_time + (s->char_tx_time * 4)); } uart_update_status(s); @@ -452,10 +452,10 @@ static int cadence_uart_init(SysBusDevice *dev) sysbus_init_mmio(dev, &s->iomem); sysbus_init_irq(dev, &s->irq); - s->fifo_trigger_handle = qemu_new_timer_ns(vm_clock, + s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *)fifo_trigger_update, s); - s->tx_time_handle = qemu_new_timer_ns(vm_clock, + s->tx_time_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *)uart_tx_write, s); s->char_tx_time = (get_ticks_per_sec() / 9600) * 10; diff --git a/hw/char/serial.c b/hw/char/serial.c index a31eb5756a..27dab7d9d6 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -189,7 +189,7 @@ static void serial_update_msl(SerialState *s) uint8_t omsr; int flags; - qemu_del_timer(s->modem_status_poll); + timer_del(s->modem_status_poll); if (qemu_chr_fe_ioctl(s->chr,CHR_IOCTL_SERIAL_GET_TIOCM, &flags) == -ENOTSUP) { s->poll_msl = -1; @@ -216,7 +216,7 @@ static void serial_update_msl(SerialState *s) We'll be lazy and poll only every 10ms, and only poll it at all if MSI interrupts are turned on */ if (s->poll_msl) - qemu_mod_timer(s->modem_status_poll, qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 100); + timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec() / 100); } static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque) @@ -253,7 +253,7 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque) s->tsr_retry = 0; } - s->last_xmit_ts = qemu_get_clock_ns(vm_clock); + s->last_xmit_ts = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (s->lsr & UART_LSR_THRE) { s->lsr |= UART_LSR_TEMT; @@ -307,7 +307,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val, s->poll_msl = 1; serial_update_msl(s); } else { - qemu_del_timer(s->modem_status_poll); + timer_del(s->modem_status_poll); s->poll_msl = 0; } } @@ -330,7 +330,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val, /* FIFO clear */ if (val & UART_FCR_RFR) { - qemu_del_timer(s->fifo_timeout_timer); + timer_del(s->fifo_timeout_timer); s->timeout_ipending=0; fifo8_reset(&s->recv_fifo); } @@ -398,7 +398,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val, qemu_chr_fe_ioctl(s->chr,CHR_IOCTL_SERIAL_SET_TIOCM, &flags); /* Update the modem status after a one-character-send wait-time, since there may be a response from the device/computer at the other end of the serial line */ - qemu_mod_timer(s->modem_status_poll, qemu_get_clock_ns(vm_clock) + s->char_transmit_time); + timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time); } } break; @@ -430,7 +430,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size) if (s->recv_fifo.num == 0) { s->lsr &= ~(UART_LSR_DR | UART_LSR_BI); } else { - qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock_ns (vm_clock) + s->char_transmit_time * 4); + timer_mod(s->fifo_timeout_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time * 4); } s->timeout_ipending = 0; } else { @@ -557,7 +557,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size) } s->lsr |= UART_LSR_DR; /* call the timeout receive callback in 4 char transmit time */ - qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock_ns (vm_clock) + s->char_transmit_time * 4); + timer_mod(s->fifo_timeout_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time * 4); } else { if (s->lsr & UART_LSR_DR) s->lsr |= UART_LSR_OE; @@ -636,7 +636,7 @@ static void serial_reset(void *opaque) fifo8_reset(&s->recv_fifo); fifo8_reset(&s->xmit_fifo); - s->last_xmit_ts = qemu_get_clock_ns(vm_clock); + s->last_xmit_ts = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->thr_ipending = 0; s->last_break_enable = 0; @@ -650,9 +650,9 @@ void serial_realize_core(SerialState *s, Error **errp) return; } - s->modem_status_poll = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) serial_update_msl, s); + s->modem_status_poll = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) serial_update_msl, s); - s->fifo_timeout_timer = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) fifo_timeout_int, s); + s->fifo_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) fifo_timeout_int, s); qemu_register_reset(serial_reset, s); qemu_chr_add_handlers(s->chr, serial_can_receive1, serial_receive1, diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index da417c7010..f23f555dde 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -603,7 +603,7 @@ static void virtio_serial_post_load_timer_cb(void *opaque) } } g_free(s->post_load->connected); - qemu_free_timer(s->post_load->timer); + timer_free(s->post_load->timer); g_free(s->post_load); s->post_load = NULL; } @@ -618,7 +618,7 @@ static int fetch_active_ports_list(QEMUFile *f, int version_id, s->post_load->connected = g_malloc0(sizeof(*s->post_load->connected) * nr_active_ports); - s->post_load->timer = qemu_new_timer_ns(vm_clock, + s->post_load->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, virtio_serial_post_load_timer_cb, s); @@ -660,7 +660,7 @@ static int fetch_active_ports_list(QEMUFile *f, int version_id, } } } - qemu_mod_timer(s->post_load->timer, 1); + timer_mod(s->post_load->timer, 1); return 0; } @@ -999,8 +999,8 @@ static int virtio_serial_device_exit(DeviceState *dev) g_free(vser->ports_map); if (vser->post_load) { g_free(vser->post_load->connected); - qemu_del_timer(vser->post_load->timer); - qemu_free_timer(vser->post_load->timer); + timer_del(vser->post_load->timer); + timer_free(vser->post_load->timer); g_free(vser->post_load); } virtio_cleanup(vdev); diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c index 4bc96c9fa2..3036bde1f3 100644 --- a/hw/core/ptimer.c +++ b/hw/core/ptimer.c @@ -48,7 +48,7 @@ static void ptimer_reload(ptimer_state *s) if (s->period_frac) { s->next_event += ((int64_t)s->period_frac * s->delta) >> 32; } - qemu_mod_timer(s->timer, s->next_event); + timer_mod(s->timer, s->next_event); } static void ptimer_tick(void *opaque) @@ -69,7 +69,7 @@ uint64_t ptimer_get_count(ptimer_state *s) uint64_t counter; if (s->enabled) { - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* Figure out the current counter value. */ if (now - s->next_event > 0 || s->period == 0) { @@ -123,7 +123,7 @@ void ptimer_set_count(ptimer_state *s, uint64_t count) { s->delta = count; if (s->enabled) { - s->next_event = qemu_get_clock_ns(vm_clock); + s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ptimer_reload(s); } } @@ -138,7 +138,7 @@ void ptimer_run(ptimer_state *s, int oneshot) return; } s->enabled = oneshot ? 2 : 1; - s->next_event = qemu_get_clock_ns(vm_clock); + s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ptimer_reload(s); } @@ -150,7 +150,7 @@ void ptimer_stop(ptimer_state *s) return; s->delta = ptimer_get_count(s); - qemu_del_timer(s->timer); + timer_del(s->timer); s->enabled = 0; } @@ -160,7 +160,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period) s->period = period; s->period_frac = 0; if (s->enabled) { - s->next_event = qemu_get_clock_ns(vm_clock); + s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ptimer_reload(s); } } @@ -171,7 +171,7 @@ void ptimer_set_freq(ptimer_state *s, uint32_t freq) s->period = 1000000000ll / freq; s->period_frac = (1000000000ll << 32) / freq; if (s->enabled) { - s->next_event = qemu_get_clock_ns(vm_clock); + s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ptimer_reload(s); } } @@ -197,7 +197,7 @@ void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) if (reload) s->delta = limit; if (s->enabled && reload) { - s->next_event = qemu_get_clock_ns(vm_clock); + s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ptimer_reload(s); } } @@ -226,6 +226,6 @@ ptimer_state *ptimer_init(QEMUBH *bh) s = (ptimer_state *)g_malloc0(sizeof(ptimer_state)); s->bh = bh; - s->timer = qemu_new_timer_ns(vm_clock, ptimer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s); return s; } diff --git a/hw/display/qxl-logger.c b/hw/display/qxl-logger.c index 3cd85d9b97..c900c2ca4f 100644 --- a/hw/display/qxl-logger.c +++ b/hw/display/qxl-logger.c @@ -242,7 +242,7 @@ int qxl_log_command(PCIQXLDevice *qxl, const char *ring, QXLCommandExt *ext) if (!qxl->cmdlog) { return 0; } - fprintf(stderr, "%" PRId64 " qxl-%d/%s:", qemu_get_clock_ns(vm_clock), + fprintf(stderr, "%" PRId64 " qxl-%d/%s:", qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), qxl->id, ring); fprintf(stderr, " cmd @ 0x%" PRIx64 " %s%s", ext->cmd.data, qxl_name(qxl_type, ext->cmd.type), diff --git a/hw/display/qxl.c b/hw/display/qxl.c index c5370575ea..7649f2b1f4 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1596,7 +1596,7 @@ async_common: trace_qxl_io_log(d->id, d->ram->log_buf); if (d->guestdebug) { fprintf(stderr, "qxl/guest-%d: %" PRId64 ": %s", d->id, - qemu_get_clock_ns(vm_clock), d->ram->log_buf); + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), d->ram->log_buf); } break; case QXL_IO_RESET: diff --git a/hw/display/vga.c b/hw/display/vga.c index 06f44a808c..7b91d9c54e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -318,7 +318,7 @@ static uint8_t vga_precise_retrace(VGACommonState *s) int cur_line, cur_line_char, cur_char; int64_t cur_tick; - cur_tick = qemu_get_clock_ns(vm_clock); + cur_tick = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); cur_char = (cur_tick / r->ticks_per_char) % r->total_chars; cur_line = cur_char / r->htotal; @@ -1304,7 +1304,7 @@ static void vga_draw_text(VGACommonState *s, int full_update) uint32_t *ch_attr_ptr; vga_draw_glyph8_func *vga_draw_glyph8; vga_draw_glyph9_func *vga_draw_glyph9; - int64_t now = qemu_get_clock_ms(vm_clock); + int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); /* compute font data address (in plane 2) */ v = s->sr[VGA_SEQ_CHARACTER_MAP]; @@ -1907,7 +1907,7 @@ static void vga_update_display(void *opaque) } if (graphic_mode != s->graphic_mode) { s->graphic_mode = graphic_mode; - s->cursor_blink_time = qemu_get_clock_ms(vm_clock); + s->cursor_blink_time = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); full_update = 1; } switch(graphic_mode) { diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index ddcc4135d7..401399d330 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -1256,7 +1256,7 @@ static void pl330_dma_stop_irq(void *opaque, int irq, int level) if (s->periph_busy[irq] != level) { s->periph_busy[irq] = level; - qemu_mod_timer(s->timer, qemu_get_clock_ns(vm_clock)); + timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } } @@ -1519,7 +1519,7 @@ static void pl330_reset(DeviceState *d) s->periph_busy[i] = 0; } - qemu_del_timer(s->timer); + timer_del(s->timer); } static void pl330_realize(DeviceState *dev, Error **errp) @@ -1532,7 +1532,7 @@ static void pl330_realize(DeviceState *dev, Error **errp) "dma", PL330_IOMEM_SIZE); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); - s->timer = qemu_new_timer_ns(vm_clock, pl330_exec_cycle_timer, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl330_exec_cycle_timer, s); s->cfg[0] = (s->mgr_ns_at_rst ? 0x4 : 0) | (s->num_periph_req > 0 ? 1 : 0) | diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 4ec433f957..af2663256e 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -107,7 +107,7 @@ static void set_next_tick(rc4030State *s) tm_hz = 1000 / (s->itr + 1); - qemu_mod_timer(s->periodic_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(s->periodic_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec() / tm_hz); } @@ -806,7 +806,7 @@ void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, *irqs = qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16); *dmas = rc4030_allocate_dmas(s, 4); - s->periodic_timer = qemu_new_timer_ns(vm_clock, rc4030_periodic_timer, s); + s->periodic_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, rc4030_periodic_timer, s); s->timer_irq = timer; s->jazz_bus_irq = jazz_bus; diff --git a/hw/dma/soc_dma.c b/hw/dma/soc_dma.c index 5e3491d373..c06aabb406 100644 --- a/hw/dma/soc_dma.c +++ b/hw/dma/soc_dma.c @@ -84,10 +84,10 @@ struct dma_s { static void soc_dma_ch_schedule(struct soc_dma_ch_s *ch, int delay_bytes) { - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); struct dma_s *dma = (struct dma_s *) ch->dma; - qemu_mod_timer(ch->timer, now + delay_bytes / dma->channel_freq); + timer_mod(ch->timer, now + delay_bytes / dma->channel_freq); } static void soc_dma_ch_run(void *opaque) @@ -217,7 +217,7 @@ void soc_dma_set_request(struct soc_dma_ch_s *ch, int level) ch->enable = level; if (!ch->enable) - qemu_del_timer(ch->timer); + timer_del(ch->timer); else if (!ch->running) soc_dma_ch_run(ch); else @@ -246,7 +246,7 @@ struct soc_dma_s *soc_dma_init(int n) for (i = 0; i < n; i ++) { s->ch[i].dma = &s->soc; s->ch[i].num = i; - s->ch[i].timer = qemu_new_timer_ns(vm_clock, soc_dma_ch_run, &s->ch[i]); + s->ch[i].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, soc_dma_ch_run, &s->ch[i]); } soc_dma_reset(&s->soc); diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index a48e3baa99..59e8e35a4c 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -27,6 +27,7 @@ #include "hw/ptimer.h" #include "qemu/log.h" #include "qapi/qmp/qerror.h" +#include "qemu/main-loop.h" #include "hw/stream.h" diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c index 179b806d96..5609063120 100644 --- a/hw/i386/kvm/apic.c +++ b/hw/i386/kvm/apic.c @@ -79,7 +79,7 @@ void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic) v = (s->divide_conf & 3) | ((s->divide_conf >> 1) & 4); s->count_shift = (v + 1) & 7; - s->initial_count_load_time = qemu_get_clock_ns(vm_clock); + s->initial_count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); apic_next_timer(s, s->initial_count_load_time); } diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index c1f40948f9..20b6457fbd 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -65,12 +65,12 @@ static void kvm_pit_update_clock_offset(KVMPITState *s) /* * Measure the delta between CLOCK_MONOTONIC, the base used for - * kvm_pit_channel_state::count_load_time, and vm_clock. Take the + * kvm_pit_channel_state::count_load_time, and QEMU_CLOCK_VIRTUAL. Take the * minimum of several samples to filter out scheduling noise. */ clock_offset = INT64_MAX; for (i = 0; i < CALIBRATION_ROUNDS; i++) { - offset = qemu_get_clock_ns(vm_clock); + offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); clock_gettime(CLOCK_MONOTONIC, &ts); offset -= ts.tv_nsec; offset -= (int64_t)ts.tv_sec * 1000000000; @@ -194,7 +194,7 @@ static void kvm_pit_set_gate(PITCommonState *s, PITChannelState *sc, int val) case 5: if (sc->gate < val) { /* restart counting on rising edge */ - sc->count_load_time = qemu_get_clock_ns(vm_clock); + sc->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } break; } diff --git a/hw/i386/xen_domainbuild.c b/hw/i386/xen_domainbuild.c index 4e2cf95ae5..c0ab7537df 100644 --- a/hw/i386/xen_domainbuild.c +++ b/hw/i386/xen_domainbuild.c @@ -148,7 +148,7 @@ static void xen_domain_poll(void *opaque) goto quit; } - qemu_mod_timer(xen_poll, qemu_get_clock_ms(rt_clock) + 1000); + timer_mod(xen_poll, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); return; quit: @@ -290,8 +290,8 @@ int xen_domain_build_pv(const char *kernel, const char *ramdisk, goto err; } - xen_poll = qemu_new_timer_ms(rt_clock, xen_domain_poll, NULL); - qemu_mod_timer(xen_poll, qemu_get_clock_ms(rt_clock) + 1000); + xen_poll = timer_new_ms(QEMU_CLOCK_REALTIME, xen_domain_poll, NULL); + timer_mod(xen_poll, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); return 0; err: diff --git a/hw/ide/core.c b/hw/ide/core.c index a73af7252a..399b1bae68 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -768,8 +768,8 @@ static void ide_sector_write_cb(void *opaque, int ret) that at the expense of slower write performances. Use this option _only_ to install Windows 2000. You must disable it for normal use. */ - qemu_mod_timer(s->sector_write_timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000)); + timer_mod(s->sector_write_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 1000)); } else { ide_set_irq(s->bus); } @@ -2163,7 +2163,7 @@ static void ide_init1(IDEBus *bus, int unit) s->smart_selftest_data = qemu_blockalign(s->bs, 512); memset(s->smart_selftest_data, 0, 512); - s->sector_write_timer = qemu_new_timer_ns(vm_clock, + s->sector_write_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ide_sector_write_timer_cb, s); } diff --git a/hw/input/hid.c b/hw/input/hid.c index 14b3125956..bb0fa6a619 100644 --- a/hw/input/hid.c +++ b/hw/input/hid.c @@ -85,8 +85,8 @@ static void hid_idle_timer(void *opaque) static void hid_del_idle_timer(HIDState *hs) { if (hs->idle_timer) { - qemu_del_timer(hs->idle_timer); - qemu_free_timer(hs->idle_timer); + timer_del(hs->idle_timer); + timer_free(hs->idle_timer); hs->idle_timer = NULL; } } @@ -94,12 +94,12 @@ static void hid_del_idle_timer(HIDState *hs) void hid_set_next_idle(HIDState *hs) { if (hs->idle) { - uint64_t expire_time = qemu_get_clock_ns(vm_clock) + + uint64_t expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec() * hs->idle * 4 / 1000; if (!hs->idle_timer) { - hs->idle_timer = qemu_new_timer_ns(vm_clock, hid_idle_timer, hs); + hs->idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hid_idle_timer, hs); } - qemu_mod_timer_ns(hs->idle_timer, expire_time); + timer_mod_ns(hs->idle_timer, expire_time); } else { hid_del_idle_timer(hs); } diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index bacbeb2343..f583cf0279 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -365,7 +365,7 @@ static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) break; } - qemu_del_timer(s->pwm.tm[(value & 3) - 1]); + timer_del(s->pwm.tm[(value & 3) - 1]); break; case LM832x_GENERAL_ERROR: @@ -463,9 +463,9 @@ static int lm8323_init(I2CSlave *i2c) LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c); s->model = 0x8323; - s->pwm.tm[0] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm0_tick, s); - s->pwm.tm[1] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm1_tick, s); - s->pwm.tm[2] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm2_tick, s); + s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); + s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); + s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1); lm_kbd_reset(s); diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c index a771cd5e52..21d4f4dbbd 100644 --- a/hw/input/tsc2005.c +++ b/hw/input/tsc2005.c @@ -201,7 +201,7 @@ static void tsc2005_write(TSC2005State *s, int reg, uint16_t data) fprintf(stderr, "%s: touchscreen sense %sabled\n", __FUNCTION__, s->enabled ? "en" : "dis"); if (s->busy && !s->enabled) - qemu_del_timer(s->timer); + timer_del(s->timer); s->busy &= s->enabled; } s->nextprecision = (data >> 13) & 1; @@ -290,8 +290,8 @@ static void tsc2005_pin_update(TSC2005State *s) s->precision = s->nextprecision; s->function = s->nextfunction; s->pdst = !s->pnd0; /* Synchronised on internal clock */ - expires = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() >> 7); - qemu_mod_timer(s->timer, expires); + expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() >> 7); + timer_mod(s->timer, expires); } static void tsc2005_reset(TSC2005State *s) @@ -337,7 +337,7 @@ static uint8_t tsc2005_txrx_word(void *opaque, uint8_t value) fprintf(stderr, "%s: touchscreen sense %sabled\n", __FUNCTION__, s->enabled ? "en" : "dis"); if (s->busy && !s->enabled) - qemu_del_timer(s->timer); + timer_del(s->timer); s->busy &= s->enabled; } tsc2005_pin_update(s); @@ -449,7 +449,7 @@ static void tsc2005_save(QEMUFile *f, void *opaque) qemu_put_be16s(f, &s->dav); qemu_put_be16s(f, &s->data); - qemu_put_timer(f, s->timer); + timer_put(f, s->timer); qemu_put_byte(f, s->enabled); qemu_put_byte(f, s->host_mode); qemu_put_byte(f, s->function); @@ -490,7 +490,7 @@ static int tsc2005_load(QEMUFile *f, void *opaque, int version_id) qemu_get_be16s(f, &s->dav); qemu_get_be16s(f, &s->data); - qemu_get_timer(f, s->timer); + timer_get(f, s->timer); s->enabled = qemu_get_byte(f); s->host_mode = qemu_get_byte(f); s->function = qemu_get_byte(f); @@ -513,7 +513,7 @@ static int tsc2005_load(QEMUFile *f, void *opaque, int version_id) for (i = 0; i < 8; i ++) s->tr[i] = qemu_get_be32(f); - s->busy = qemu_timer_pending(s->timer); + s->busy = timer_pending(s->timer); tsc2005_pin_update(s); return 0; @@ -529,7 +529,7 @@ void *tsc2005_init(qemu_irq pintdav) s->y = 240; s->pressure = 0; s->precision = s->nextprecision = 0; - s->timer = qemu_new_timer_ns(vm_clock, tsc2005_timer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc2005_timer_tick, s); s->pint = pintdav; s->model = 0x2005; diff --git a/hw/input/tsc210x.c b/hw/input/tsc210x.c index 9b854e77dd..485c9e5753 100644 --- a/hw/input/tsc210x.c +++ b/hw/input/tsc210x.c @@ -503,9 +503,9 @@ static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg) l_ch = 1; r_ch = 1; if (s->softstep && !(s->dac_power & (1 << 10))) { - l_ch = (qemu_get_clock_ns(vm_clock) > + l_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) > s->volume_change + TSC_SOFTSTEP_DELAY); - r_ch = (qemu_get_clock_ns(vm_clock) > + r_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) > s->volume_change + TSC_SOFTSTEP_DELAY); } @@ -514,7 +514,7 @@ static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg) case 0x05: /* Stereo DAC Power Control */ return 0x2aa0 | s->dac_power | (((s->dac_power & (1 << 10)) && - (qemu_get_clock_ns(vm_clock) > + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) > s->powerdown + TSC_POWEROFF_DELAY)) << 6); case 0x06: /* Audio Control 3 */ @@ -594,7 +594,7 @@ static void tsc2102_control_register_write( s->host_mode = value >> 15; s->enabled = !(value & 0x4000); if (s->busy && !s->enabled) - qemu_del_timer(s->timer); + timer_del(s->timer); s->busy &= s->enabled; s->nextfunction = (value >> 10) & 0xf; s->nextprecision = (value >> 8) & 3; @@ -629,7 +629,7 @@ static void tsc2102_control_register_write( case 0x04: /* Reset */ if (value == 0xbb00) { if (s->busy) - qemu_del_timer(s->timer); + timer_del(s->timer); tsc210x_reset(s); #ifdef TSC_VERBOSE } else { @@ -695,7 +695,7 @@ static void tsc2102_audio_register_write( case 0x02: /* DAC Volume Control */ s->volume = value; - s->volume_change = qemu_get_clock_ns(vm_clock); + s->volume_change = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); return; case 0x03: @@ -717,7 +717,7 @@ static void tsc2102_audio_register_write( case 0x05: /* Stereo DAC Power Control */ if ((value & ~s->dac_power) & (1 << 10)) - s->powerdown = qemu_get_clock_ns(vm_clock); + s->powerdown = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->dac_power = value & 0x9543; #ifdef TSC_VERBOSE @@ -864,8 +864,8 @@ static void tsc210x_pin_update(TSC210xState *s) s->busy = 1; s->precision = s->nextprecision; s->function = s->nextfunction; - expires = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() >> 10); - qemu_mod_timer(s->timer, expires); + expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() >> 10); + timer_mod(s->timer, expires); } static uint16_t tsc210x_read(TSC210xState *s) @@ -1005,7 +1005,7 @@ static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out) static void tsc210x_save(QEMUFile *f, void *opaque) { TSC210xState *s = (TSC210xState *) opaque; - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); int i; qemu_put_be16(f, s->x); @@ -1020,7 +1020,7 @@ static void tsc210x_save(QEMUFile *f, void *opaque) qemu_put_byte(f, s->irq); qemu_put_be16s(f, &s->dav); - qemu_put_timer(f, s->timer); + timer_put(f, s->timer); qemu_put_byte(f, s->enabled); qemu_put_byte(f, s->host_mode); qemu_put_byte(f, s->function); @@ -1051,7 +1051,7 @@ static void tsc210x_save(QEMUFile *f, void *opaque) static int tsc210x_load(QEMUFile *f, void *opaque, int version_id) { TSC210xState *s = (TSC210xState *) opaque; - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); int i; s->x = qemu_get_be16(f); @@ -1066,7 +1066,7 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id) s->irq = qemu_get_byte(f); qemu_get_be16s(f, &s->dav); - qemu_get_timer(f, s->timer); + timer_get(f, s->timer); s->enabled = qemu_get_byte(f); s->host_mode = qemu_get_byte(f); s->function = qemu_get_byte(f); @@ -1093,7 +1093,7 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id) for (i = 0; i < 0x14; i ++) qemu_get_be16s(f, &s->filter_data[i]); - s->busy = qemu_timer_pending(s->timer); + s->busy = timer_pending(s->timer); qemu_set_irq(s->pint, !s->irq); qemu_set_irq(s->davint, !s->dav); @@ -1111,7 +1111,7 @@ uWireSlave *tsc2102_init(qemu_irq pint) s->y = 160; s->pressure = 0; s->precision = s->nextprecision = 0; - s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s); s->pint = pint; s->model = 0x2102; s->name = "tsc2102"; @@ -1160,7 +1160,7 @@ uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav) s->y = 240; s->pressure = 0; s->precision = s->nextprecision = 0; - s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s); s->pint = penirq; s->kbint = kbirq; s->davint = dav; diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 5e3b96e4db..a913186ed0 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -606,7 +606,7 @@ static uint32_t apic_get_current_count(APICCommonState *s) { int64_t d; uint32_t val; - d = (qemu_get_clock_ns(vm_clock) - s->initial_count_load_time) >> + d = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->initial_count_load_time) >> s->count_shift; if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) { /* periodic */ @@ -623,9 +623,9 @@ static uint32_t apic_get_current_count(APICCommonState *s) static void apic_timer_update(APICCommonState *s, int64_t current_time) { if (apic_next_timer(s, current_time)) { - qemu_mod_timer(s->timer, s->next_time); + timer_mod(s->timer, s->next_time); } else { - qemu_del_timer(s->timer); + timer_del(s->timer); } } @@ -822,7 +822,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) int n = index - 0x32; s->lvt[n] = val; if (n == APIC_LVT_TIMER) { - apic_timer_update(s, qemu_get_clock_ns(vm_clock)); + apic_timer_update(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } else if (n == APIC_LVT_LINT0 && apic_check_pic(s)) { apic_update_irq(s); } @@ -830,7 +830,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) break; case 0x38: s->initial_count = val; - s->initial_count_load_time = qemu_get_clock_ns(vm_clock); + s->initial_count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); apic_timer_update(s, s->initial_count_load_time); break; case 0x39: @@ -857,9 +857,9 @@ static void apic_pre_save(APICCommonState *s) static void apic_post_load(APICCommonState *s) { if (s->timer_expiry != -1) { - qemu_mod_timer(s->timer, s->timer_expiry); + timer_mod(s->timer, s->timer_expiry); } else { - qemu_del_timer(s->timer); + timer_del(s->timer); } } @@ -876,7 +876,7 @@ static void apic_init(APICCommonState *s) memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi", APIC_SPACE_SIZE); - s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s); local_apics[s->idx] = s; msi_supported = true; diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index b03e904a7a..a0beb10863 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -198,7 +198,7 @@ void apic_init_reset(DeviceState *d) s->wait_for_sipi = 1; if (s->timer) { - qemu_del_timer(s->timer); + timer_del(s->timer); } s->timer_expiry = -1; } diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 178344b5a3..6066fa6838 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -78,9 +78,9 @@ static inline int64_t systick_scale(nvic_state *s) static void systick_reload(nvic_state *s, int reset) { if (reset) - s->systick.tick = qemu_get_clock_ns(vm_clock); + s->systick.tick = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->systick.tick += (s->systick.reload + 1) * systick_scale(s); - qemu_mod_timer(s->systick.timer, s->systick.tick); + timer_mod(s->systick.timer, s->systick.tick); } static void systick_timer_tick(void * opaque) @@ -103,7 +103,7 @@ static void systick_reset(nvic_state *s) s->systick.control = 0; s->systick.reload = 0; s->systick.tick = 0; - qemu_del_timer(s->systick.timer); + timer_del(s->systick.timer); } /* The external routines use the hardware vector numbering, ie. the first @@ -158,7 +158,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset) int64_t t; if ((s->systick.control & SYSTICK_ENABLE) == 0) return 0; - t = qemu_get_clock_ns(vm_clock); + t = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (t >= s->systick.tick) return 0; val = ((s->systick.tick - (t + 1)) / systick_scale(s)) + 1; @@ -290,16 +290,16 @@ static void nvic_writel(nvic_state *s, uint32_t offset, uint32_t value) s->systick.control &= 0xfffffff8; s->systick.control |= value & 7; if ((oldval ^ value) & SYSTICK_ENABLE) { - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (value & SYSTICK_ENABLE) { if (s->systick.tick) { s->systick.tick += now; - qemu_mod_timer(s->systick.timer, s->systick.tick); + timer_mod(s->systick.timer, s->systick.tick); } else { systick_reload(s, 1); } } else { - qemu_del_timer(s->systick.timer); + timer_del(s->systick.timer); s->systick.tick -= now; if (s->systick.tick < 0) s->systick.tick = 0; @@ -511,7 +511,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) * by the v7M architecture. */ memory_region_add_subregion(get_system_memory(), 0xe000e000, &s->container); - s->systick.timer = qemu_new_timer_ns(vm_clock, systick_timer_tick, s); + s->systick.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, systick_timer_tick, s); } static void armv7m_nvic_instance_init(Object *obj) diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index 1415bda93f..c6f248b145 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -150,7 +150,7 @@ static void pic_set_irq(void *opaque, int irq, int level) #endif #ifdef DEBUG_IRQ_LATENCY if (level) { - irq_time[irq_index] = qemu_get_clock_ns(vm_clock); + irq_time[irq_index] = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } #endif @@ -228,7 +228,7 @@ int pic_read_irq(DeviceState *d) #ifdef DEBUG_IRQ_LATENCY printf("IRQ%d latency=%0.3fus\n", irq, - (double)(qemu_get_clock_ns(vm_clock) - + (double)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - irq_time[irq]) * 1000000.0 / get_ticks_per_sec()); #endif DPRINTF("pic_interrupt: irq=%d\n", irq); diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c index e0266bf15a..c8b4b000cd 100644 --- a/hw/mips/cputimer.c +++ b/hw/mips/cputimer.c @@ -47,11 +47,11 @@ static void cpu_mips_timer_update(CPUMIPSState *env) uint64_t now, next; uint32_t wait; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); wait = env->CP0_Compare - env->CP0_Count - (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec()); next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ); - qemu_mod_timer(env->timer, next); + timer_mod(env->timer, next); } /* Expire the timer. */ @@ -71,9 +71,9 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env) } else { uint64_t now; - now = qemu_get_clock_ns(vm_clock); - if (qemu_timer_pending(env->timer) - && qemu_timer_expired(env->timer, now)) { + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + if (timer_pending(env->timer) + && timer_expired(env->timer, now)) { /* The timer has already expired. */ cpu_mips_timer_expire(env); } @@ -90,7 +90,7 @@ void cpu_mips_store_count (CPUMIPSState *env, uint32_t count) else { /* Store new count register */ env->CP0_Count = - count - (uint32_t)muldiv64(qemu_get_clock_ns(vm_clock), + count - (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), TIMER_FREQ, get_ticks_per_sec()); /* Update timer timer */ cpu_mips_timer_update(env); @@ -115,7 +115,7 @@ void cpu_mips_start_count(CPUMIPSState *env) void cpu_mips_stop_count(CPUMIPSState *env) { /* Store the current value */ - env->CP0_Count += (uint32_t)muldiv64(qemu_get_clock_ns(vm_clock), + env->CP0_Count += (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), TIMER_FREQ, get_ticks_per_sec()); } @@ -141,7 +141,7 @@ static void mips_timer_cb (void *opaque) void cpu_mips_clock_init (CPUMIPSState *env) { - env->timer = qemu_new_timer_ns(vm_clock, &mips_timer_cb, env); + env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env); env->CP0_Compare = 0; cpu_mips_store_count(env, 1); } diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c index 4a911d4f8c..0fc26d29a5 100644 --- a/hw/misc/arm_sysctl.c +++ b/hw/misc/arm_sysctl.c @@ -170,7 +170,7 @@ static uint64_t arm_sysctl_read(void *opaque, hwaddr offset, case 0x58: /* BOOTCS */ return 0; case 0x5c: /* 24MHz */ - return muldiv64(qemu_get_clock_ns(vm_clock), 24000000, get_ticks_per_sec()); + return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24000000, get_ticks_per_sec()); case 0x60: /* MISC */ return 0; case 0x84: /* PROCID0 */ diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index c0fd7da118..c811b9519b 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -128,7 +128,7 @@ static unsigned int get_counter(CUDATimer *s) int64_t d; unsigned int counter; - d = muldiv64(qemu_get_clock_ns(vm_clock) - s->load_time, + d = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->load_time, CUDA_TIMER_FREQ, get_ticks_per_sec()); if (s->index == 0) { /* the timer goes down from latch to -1 (period of latch + 2) */ @@ -147,7 +147,7 @@ static unsigned int get_counter(CUDATimer *s) static void set_counter(CUDAState *s, CUDATimer *ti, unsigned int val) { CUDA_DPRINTF("T%d.counter=%d\n", 1 + (ti->timer == NULL), val); - ti->load_time = qemu_get_clock_ns(vm_clock); + ti->load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ti->counter_value = val; cuda_timer_update(s, ti, ti->load_time); } @@ -191,10 +191,10 @@ static void cuda_timer_update(CUDAState *s, CUDATimer *ti, if (!ti->timer) return; if ((s->acr & T1MODE) != T1MODE_CONT) { - qemu_del_timer(ti->timer); + timer_del(ti->timer); } else { ti->next_irq_time = get_next_irq_time(ti, current_time); - qemu_mod_timer(ti->timer, ti->next_irq_time); + timer_mod(ti->timer, ti->next_irq_time); } } @@ -304,7 +304,7 @@ static void cuda_writeb(void *opaque, hwaddr addr, uint32_t val) break; case 4: s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; - cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); + cuda_timer_update(s, &s->timers[0], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); break; case 5: s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); @@ -313,12 +313,12 @@ static void cuda_writeb(void *opaque, hwaddr addr, uint32_t val) break; case 6: s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; - cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); + cuda_timer_update(s, &s->timers[0], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); break; case 7: s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); s->ifr &= ~T1_INT; - cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); + cuda_timer_update(s, &s->timers[0], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); break; case 8: s->timers[1].latch = val; @@ -332,7 +332,7 @@ static void cuda_writeb(void *opaque, hwaddr addr, uint32_t val) break; case 11: s->acr = val; - cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); + cuda_timer_update(s, &s->timers[0], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); cuda_update(s); break; case 12: @@ -463,8 +463,8 @@ static void cuda_adb_poll(void *opaque) obuf[1] = 0x40; /* polled data */ cuda_send_packet_to_host(s, obuf, olen + 2); } - qemu_mod_timer(s->adb_poll_timer, - qemu_get_clock_ns(vm_clock) + + timer_mod(s->adb_poll_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ)); } @@ -481,11 +481,11 @@ static void cuda_receive_packet(CUDAState *s, if (autopoll != s->autopoll) { s->autopoll = autopoll; if (autopoll) { - qemu_mod_timer(s->adb_poll_timer, - qemu_get_clock_ns(vm_clock) + + timer_mod(s->adb_poll_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ)); } else { - qemu_del_timer(s->adb_poll_timer); + timer_del(s->adb_poll_timer); } } obuf[0] = CUDA_PACKET; @@ -494,14 +494,14 @@ static void cuda_receive_packet(CUDAState *s, break; case CUDA_SET_TIME: ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + (((uint32_t)data[3]) << 8) + data[4]; - s->tick_offset = ti - (qemu_get_clock_ns(vm_clock) / get_ticks_per_sec()); + s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / get_ticks_per_sec()); obuf[0] = CUDA_PACKET; obuf[1] = 0; obuf[2] = 0; cuda_send_packet_to_host(s, obuf, 3); break; case CUDA_GET_TIME: - ti = s->tick_offset + (qemu_get_clock_ns(vm_clock) / get_ticks_per_sec()); + ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / get_ticks_per_sec()); obuf[0] = CUDA_PACKET; obuf[1] = 0; obuf[2] = 0; @@ -689,12 +689,12 @@ static void cuda_realizefn(DeviceState *dev, Error **errp) CUDAState *s = CUDA(dev); struct tm tm; - s->timers[0].timer = qemu_new_timer_ns(vm_clock, cuda_timer1, s); + s->timers[0].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_timer1, s); qemu_get_timedate(&tm, 0); s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET; - s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s); + s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s); } static void cuda_initfn(Object *obj) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index c0d0bf7287..9cc33d8f96 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -245,10 +245,10 @@ static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) switch (addr) { case 0x38: - value = qemu_get_clock_ns(vm_clock); + value = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); break; case 0x3c: - value = qemu_get_clock_ns(vm_clock) >> 32; + value = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 32; break; } diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c index 017e69352a..d215e29e46 100644 --- a/hw/misc/vfio.c +++ b/hw/misc/vfio.c @@ -276,8 +276,8 @@ static void vfio_intx_mmap_enable(void *opaque) VFIODevice *vdev = opaque; if (vdev->intx.pending) { - qemu_mod_timer(vdev->intx.mmap_timer, - qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout); + timer_mod(vdev->intx.mmap_timer, + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout); return; } @@ -300,8 +300,8 @@ static void vfio_intx_interrupt(void *opaque) qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1); vfio_mmap_set_enabled(vdev, false); if (vdev->intx.mmap_timeout) { - qemu_mod_timer(vdev->intx.mmap_timer, - qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout); + timer_mod(vdev->intx.mmap_timer, + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout); } } @@ -543,7 +543,7 @@ static void vfio_disable_intx(VFIODevice *vdev) { int fd; - qemu_del_timer(vdev->intx.mmap_timer); + timer_del(vdev->intx.mmap_timer); vfio_disable_intx_kvm(vdev); vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX); vdev->intx.pending = false; @@ -3176,7 +3176,7 @@ static int vfio_initfn(PCIDevice *pdev) } if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) { - vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock, + vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, vfio_intx_mmap_enable, vdev); pci_device_set_intx_routing_notifier(&vdev->pdev, vfio_update_irq); ret = vfio_enable_intx(vdev); @@ -3210,7 +3210,7 @@ static void vfio_exitfn(PCIDevice *pdev) pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); vfio_disable_interrupts(vdev); if (vdev->intx.mmap_timer) { - qemu_free_timer(vdev->intx.mmap_timer); + timer_free(vdev->intx.mmap_timer); } vfio_teardown_msi(vdev); vfio_unmap_bars(vdev); diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 049aa704c1..789d385743 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -274,7 +274,7 @@ static void do_read_rra(dp8393xState *s) static void do_software_reset(dp8393xState *s) { - qemu_del_timer(s->watchdog); + timer_del(s->watchdog); s->regs[SONIC_CR] &= ~(SONIC_CR_LCAM | SONIC_CR_RRRA | SONIC_CR_TXP | SONIC_CR_HTX); s->regs[SONIC_CR] |= SONIC_CR_RST | SONIC_CR_RXDIS; @@ -286,14 +286,14 @@ static void set_next_tick(dp8393xState *s) int64_t delay; if (s->regs[SONIC_CR] & SONIC_CR_STP) { - qemu_del_timer(s->watchdog); + timer_del(s->watchdog); return; } ticks = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0]; - s->wt_last_update = qemu_get_clock_ns(vm_clock); + s->wt_last_update = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); delay = get_ticks_per_sec() * ticks / 5000000; - qemu_mod_timer(s->watchdog, s->wt_last_update + delay); + timer_mod(s->watchdog, s->wt_last_update + delay); } static void update_wt_regs(dp8393xState *s) @@ -302,11 +302,11 @@ static void update_wt_regs(dp8393xState *s) uint32_t val; if (s->regs[SONIC_CR] & SONIC_CR_STP) { - qemu_del_timer(s->watchdog); + timer_del(s->watchdog); return; } - elapsed = s->wt_last_update - qemu_get_clock_ns(vm_clock); + elapsed = s->wt_last_update - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); val = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0]; val -= elapsed / 5000000; s->regs[SONIC_WT1] = (val >> 16) & 0xffff; @@ -838,7 +838,7 @@ static ssize_t nic_receive(NetClientState *nc, const uint8_t * buf, size_t size) static void nic_reset(void *opaque) { dp8393xState *s = opaque; - qemu_del_timer(s->watchdog); + timer_del(s->watchdog); s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS; s->regs[SONIC_DCR] &= ~(SONIC_DCR_EXBUS | SONIC_DCR_LBR); @@ -866,8 +866,8 @@ static void nic_cleanup(NetClientState *nc) memory_region_del_subregion(s->address_space, &s->mmio); memory_region_destroy(&s->mmio); - qemu_del_timer(s->watchdog); - qemu_free_timer(s->watchdog); + timer_del(s->watchdog); + timer_free(s->watchdog); g_free(s); } @@ -896,7 +896,7 @@ void dp83932_init(NICInfo *nd, hwaddr base, int it_shift, s->memory_rw = memory_rw; s->it_shift = it_shift; s->irq = irq; - s->watchdog = qemu_new_timer_ns(vm_clock, dp8393x_watchdog, s); + s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s); s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */ s->conf.macaddr = nd->macaddr; diff --git a/hw/net/e1000.c b/hw/net/e1000.c index fdb1f890b4..f5ebed46ab 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -190,7 +190,7 @@ set_phy_ctrl(E1000State *s, int index, uint16_t val) e1000_link_down(s); s->phy_reg[PHY_STATUS] &= ~MII_SR_AUTONEG_COMPLETE; DBGOUT(PHY, "Start link auto negotiation\n"); - qemu_mod_timer(s->autoneg_timer, qemu_get_clock_ms(vm_clock) + 500); + timer_mod(s->autoneg_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500); } } @@ -306,7 +306,7 @@ static void e1000_reset(void *opaque) uint8_t *macaddr = d->conf.macaddr.a; int i; - qemu_del_timer(d->autoneg_timer); + timer_del(d->autoneg_timer); memset(d->phy_reg, 0, sizeof d->phy_reg); memmove(d->phy_reg, phy_reg_init, sizeof phy_reg_init); memset(d->mac_reg, 0, sizeof d->mac_reg); @@ -1184,7 +1184,7 @@ static int e1000_post_load(void *opaque, int version_id) s->phy_reg[PHY_CTRL] & MII_CR_RESTART_AUTO_NEG && !(s->phy_reg[PHY_STATUS] & MII_SR_AUTONEG_COMPLETE)) { nc->link_down = false; - qemu_mod_timer(s->autoneg_timer, qemu_get_clock_ms(vm_clock) + 500); + timer_mod(s->autoneg_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500); } return 0; @@ -1314,8 +1314,8 @@ pci_e1000_uninit(PCIDevice *dev) { E1000State *d = E1000(dev); - qemu_del_timer(d->autoneg_timer); - qemu_free_timer(d->autoneg_timer); + timer_del(d->autoneg_timer); + timer_free(d->autoneg_timer); memory_region_destroy(&d->mmio); memory_region_destroy(&d->io); qemu_del_nic(d->nic); @@ -1370,7 +1370,7 @@ static int pci_e1000_init(PCIDevice *pci_dev) add_boot_device_path(d->conf.bootindex, dev, "/ethernet-phy@0"); - d->autoneg_timer = qemu_new_timer_ms(vm_clock, e1000_autoneg_timer, d); + d->autoneg_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, e1000_autoneg_timer, d); return 0; } diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 2c838f67dc..2315f996d4 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -439,7 +439,7 @@ static void lan9118_reset(DeviceState *d) s->afc_cfg = 0; s->e2p_cmd = 0; s->e2p_data = 0; - s->free_timer_start = qemu_get_clock_ns(vm_clock) / 40; + s->free_timer_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 40; ptimer_stop(s->timer); ptimer_set_count(s->timer, 0xffff); @@ -1236,7 +1236,7 @@ static uint64_t lan9118_readl(void *opaque, hwaddr offset, case CSR_WORD_SWAP: return s->word_swap; case CSR_FREE_RUN: - return (qemu_get_clock_ns(vm_clock) / 40) - s->free_timer_start; + return (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 40) - s->free_timer_start; case CSR_RX_DROP: /* TODO: Implement dropped frames counter. */ return 0; diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 2c2301c360..a8931652b3 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -284,8 +284,8 @@ static void pci_pcnet_uninit(PCIDevice *dev) memory_region_destroy(&d->state.mmio); memory_region_destroy(&d->io_bar); - qemu_del_timer(d->state.poll_timer); - qemu_free_timer(d->state.poll_timer); + timer_del(d->state.poll_timer); + timer_free(d->state.poll_timer); qemu_del_nic(d->state.nic); } diff --git a/hw/net/pcnet.c b/hw/net/pcnet.c index 63aa73a241..7cb47b3f1f 100644 --- a/hw/net/pcnet.c +++ b/hw/net/pcnet.c @@ -1331,7 +1331,7 @@ static void pcnet_poll_timer(void *opaque) { PCNetState *s = opaque; - qemu_del_timer(s->poll_timer); + timer_del(s->poll_timer); if (CSR_TDMD(s)) { pcnet_transmit(s); @@ -1340,7 +1340,7 @@ static void pcnet_poll_timer(void *opaque) pcnet_update_irq(s); if (!CSR_STOP(s) && !CSR_SPND(s) && !CSR_DPOLL(s)) { - uint64_t now = qemu_get_clock_ns(vm_clock) * 33; + uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) * 33; if (!s->timer || !now) s->timer = now; else { @@ -1351,8 +1351,8 @@ static void pcnet_poll_timer(void *opaque) } else CSR_POLL(s) = t; } - qemu_mod_timer(s->poll_timer, - pcnet_get_next_poll_time(s,qemu_get_clock_ns(vm_clock))); + timer_mod(s->poll_timer, + pcnet_get_next_poll_time(s,qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))); } } @@ -1731,7 +1731,7 @@ int pcnet_common_init(DeviceState *dev, PCNetState *s, NetClientInfo *info) int i; uint16_t checksum; - s->poll_timer = qemu_new_timer_ns(vm_clock, pcnet_poll_timer, s); + s->poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pcnet_poll_timer, s); qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, s); diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index ee3b6903a1..c31199f8c8 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -2648,7 +2648,7 @@ static void rtl8139_IntrMask_write(RTL8139State *s, uint32_t val) s->IntrMask = val; - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); rtl8139_update_irq(s); } @@ -2689,7 +2689,7 @@ static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val) * and probably emulated is slower is better to assume this resetting was * done before testing on previous rtl8139_update_irq lead to IRQ losing */ - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); rtl8139_update_irq(s); #endif @@ -2697,7 +2697,7 @@ static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val) static uint32_t rtl8139_IntrStatus_read(RTL8139State *s) { - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); uint32_t ret = s->IntrStatus; @@ -2913,7 +2913,7 @@ static void rtl8139_set_next_tctr_time(RTL8139State *s, int64_t current_time) s->TimerExpire = next_time; if ((s->IntrMask & PCSTimeout) != 0 && (s->IntrStatus & PCSTimeout) == 0) { - qemu_mod_timer(s->timer, next_time); + timer_mod(s->timer, next_time); } } @@ -2960,7 +2960,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val) case Timer: DPRINTF("TCTR Timer reset on write\n"); - s->TCTR_base = qemu_get_clock_ns(vm_clock); + s->TCTR_base = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); rtl8139_set_next_tctr_time(s, s->TCTR_base); break; @@ -2968,7 +2968,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val) DPRINTF("FlashReg TimerInt write val=0x%08x\n", val); if (s->TimerInt != val) { s->TimerInt = val; - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } break; @@ -3183,7 +3183,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr) break; case Timer: - ret = muldiv64(qemu_get_clock_ns(vm_clock) - s->TCTR_base, + ret = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->TCTR_base, PCI_FREQUENCY, get_ticks_per_sec()); DPRINTF("TCTR Timer read val=0x%08x\n", ret); break; @@ -3245,7 +3245,7 @@ static uint32_t rtl8139_mmio_readl(void *opaque, hwaddr addr) static int rtl8139_post_load(void *opaque, int version_id) { RTL8139State* s = opaque; - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); if (version_id < 4) { s->cplus_enabled = s->CpCmd != 0; } @@ -3275,7 +3275,7 @@ static const VMStateDescription vmstate_rtl8139_hotplug_ready ={ static void rtl8139_pre_save(void *opaque) { RTL8139State* s = opaque; - int64_t current_time = qemu_get_clock_ns(vm_clock); + int64_t current_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* set IntrStatus correctly */ rtl8139_set_next_tctr_time(s, current_time); @@ -3446,7 +3446,7 @@ static void rtl8139_timer(void *opaque) s->IntrStatus |= PCSTimeout; rtl8139_update_irq(s); - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } static void rtl8139_cleanup(NetClientState *nc) @@ -3466,8 +3466,8 @@ static void pci_rtl8139_uninit(PCIDevice *dev) g_free(s->cplus_txbuffer); s->cplus_txbuffer = NULL; } - qemu_del_timer(s->timer); - qemu_free_timer(s->timer); + timer_del(s->timer); + timer_free(s->timer); qemu_del_nic(s->nic); } @@ -3535,8 +3535,8 @@ static int pci_rtl8139_init(PCIDevice *dev) s->cplus_txbuffer_offset = 0; s->TimerExpire = 0; - s->timer = qemu_new_timer_ns(vm_clock, rtl8139_timer, s); - rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, rtl8139_timer, s); + rtl8139_set_next_tctr_time(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); add_boot_device_path(s->conf.bootindex, d, "/ethernet-phy@0"); diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index aa1880cb87..dd41008fb0 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -162,14 +162,14 @@ static void virtio_net_set_status(struct VirtIODevice *vdev, uint8_t status) if (virtio_net_started(n, queue_status) && !n->vhost_started) { if (q->tx_timer) { - qemu_mod_timer(q->tx_timer, - qemu_get_clock_ns(vm_clock) + n->tx_timeout); + timer_mod(q->tx_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + n->tx_timeout); } else { qemu_bh_schedule(q->tx_bh); } } else { if (q->tx_timer) { - qemu_del_timer(q->tx_timer); + timer_del(q->tx_timer); } else { qemu_bh_cancel(q->tx_bh); } @@ -1131,12 +1131,12 @@ static void virtio_net_handle_tx_timer(VirtIODevice *vdev, VirtQueue *vq) if (q->tx_waiting) { virtio_queue_set_notification(vq, 1); - qemu_del_timer(q->tx_timer); + timer_del(q->tx_timer); q->tx_waiting = 0; virtio_net_flush_tx(q); } else { - qemu_mod_timer(q->tx_timer, - qemu_get_clock_ns(vm_clock) + n->tx_timeout); + timer_mod(q->tx_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + n->tx_timeout); q->tx_waiting = 1; virtio_queue_set_notification(vq, 0); } @@ -1233,7 +1233,7 @@ static void virtio_net_set_multiqueue(VirtIONet *n, int multiqueue) if (n->vqs[i].tx_timer) { n->vqs[i].tx_vq = virtio_add_queue(vdev, 256, virtio_net_handle_tx_timer); - n->vqs[i].tx_timer = qemu_new_timer_ns(vm_clock, + n->vqs[i].tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, virtio_net_tx_timer, &n->vqs[i]); } else { @@ -1513,7 +1513,7 @@ static int virtio_net_device_init(VirtIODevice *vdev) if (n->net_conf.tx && !strcmp(n->net_conf.tx, "timer")) { n->vqs[0].tx_vq = virtio_add_queue(vdev, 256, virtio_net_handle_tx_timer); - n->vqs[0].tx_timer = qemu_new_timer_ns(vm_clock, virtio_net_tx_timer, + n->vqs[0].tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, virtio_net_tx_timer, &n->vqs[0]); } else { n->vqs[0].tx_vq = virtio_add_queue(vdev, 256, @@ -1598,8 +1598,8 @@ static int virtio_net_device_exit(DeviceState *qdev) qemu_purge_queued_packets(nc); if (q->tx_timer) { - qemu_del_timer(q->tx_timer); - qemu_free_timer(q->tx_timer); + timer_del(q->tx_timer); + timer_free(q->tx_timer); } else { qemu_bh_delete(q->tx_bh); } diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c index 4144b34be7..988ca20898 100644 --- a/hw/openrisc/cputimer.c +++ b/hw/openrisc/cputimer.c @@ -33,9 +33,9 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu) uint64_t now, next; uint32_t wait; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (!is_counting) { - qemu_del_timer(cpu->env.timer); + timer_del(cpu->env.timer); last_clk = now; return; } @@ -52,7 +52,7 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu) } next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ); - qemu_mod_timer(cpu->env.timer, next); + timer_mod(cpu->env.timer, next); } void cpu_openrisc_count_start(OpenRISCCPU *cpu) @@ -72,7 +72,7 @@ static void openrisc_timer_cb(void *opaque) OpenRISCCPU *cpu = opaque; if ((cpu->env.ttmr & TTMR_IE) && - qemu_timer_expired(cpu->env.timer, qemu_get_clock_ns(vm_clock))) { + timer_expired(cpu->env.timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))) { CPUState *cs = CPU(cpu); cpu->env.ttmr |= TTMR_IP; @@ -97,7 +97,7 @@ static void openrisc_timer_cb(void *opaque) void cpu_openrisc_clock_init(OpenRISCCPU *cpu) { - cpu->env.timer = qemu_new_timer_ns(vm_clock, &openrisc_timer_cb, cpu); + cpu->env.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &openrisc_timer_cb, cpu); cpu->env.ttmr = 0x00000000; cpu->env.ttcr = 0x00000000; } diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index e1c095c7e2..59b41cbc6f 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -471,7 +471,7 @@ uint64_t cpu_ppc_load_tbl (CPUPPCState *env) return env->spr[SPR_TBL]; } - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->tb_offset); LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); return tb; @@ -482,7 +482,7 @@ static inline uint32_t _cpu_ppc_load_tbu(CPUPPCState *env) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->tb_offset); LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); return tb >> 32; @@ -510,9 +510,9 @@ void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->tb_offset); tb &= 0xFFFFFFFF00000000ULL; - cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock), + cpu_ppc_store_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), &tb_env->tb_offset, tb | (uint64_t)value); } @@ -521,9 +521,9 @@ static inline void _cpu_ppc_store_tbu(CPUPPCState *env, uint32_t value) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->tb_offset); tb &= 0x00000000FFFFFFFFULL; - cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock), + cpu_ppc_store_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), &tb_env->tb_offset, ((uint64_t)value << 32) | tb); } @@ -537,7 +537,7 @@ uint64_t cpu_ppc_load_atbl (CPUPPCState *env) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->atb_offset); LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); return tb; @@ -548,7 +548,7 @@ uint32_t cpu_ppc_load_atbu (CPUPPCState *env) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->atb_offset); LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); return tb >> 32; @@ -559,9 +559,9 @@ void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->atb_offset); tb &= 0xFFFFFFFF00000000ULL; - cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock), + cpu_ppc_store_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), &tb_env->atb_offset, tb | (uint64_t)value); } @@ -570,9 +570,9 @@ void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value) ppc_tb_t *tb_env = env->tb_env; uint64_t tb; - tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset); + tb = cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tb_env->atb_offset); tb &= 0x00000000FFFFFFFFULL; - cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock), + cpu_ppc_store_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), &tb_env->atb_offset, ((uint64_t)value << 32) | tb); } @@ -583,7 +583,7 @@ static void cpu_ppc_tb_stop (CPUPPCState *env) /* If the time base is already frozen, do nothing */ if (tb_env->tb_freq != 0) { - vmclk = qemu_get_clock_ns(vm_clock); + vmclk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* Get the time base */ tb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->tb_offset); /* Get the alternate time base */ @@ -605,7 +605,7 @@ static void cpu_ppc_tb_start (CPUPPCState *env) /* If the time base is not frozen, do nothing */ if (tb_env->tb_freq == 0) { - vmclk = qemu_get_clock_ns(vm_clock); + vmclk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* Get the time base from tb_offset */ tb = tb_env->tb_offset; /* Get the alternate time base from atb_offset */ @@ -625,7 +625,7 @@ static inline uint32_t _cpu_ppc_load_decr(CPUPPCState *env, uint64_t next) uint32_t decr; int64_t diff; - diff = next - qemu_get_clock_ns(vm_clock); + diff = next - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (diff >= 0) { decr = muldiv64(diff, tb_env->decr_freq, get_ticks_per_sec()); } else if (tb_env->flags & PPC_TIMER_BOOKE) { @@ -661,7 +661,7 @@ uint64_t cpu_ppc_load_purr (CPUPPCState *env) ppc_tb_t *tb_env = env->tb_env; uint64_t diff; - diff = qemu_get_clock_ns(vm_clock) - tb_env->purr_start; + diff = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - tb_env->purr_start; return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, get_ticks_per_sec()); } @@ -701,7 +701,7 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu, uint64_t *nextp, return; } - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); next = now + muldiv64(value, get_ticks_per_sec(), tb_env->decr_freq); if (is_excp) { next += *nextp - now; @@ -711,7 +711,7 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu, uint64_t *nextp, } *nextp = next; /* Adjust timer */ - qemu_mod_timer(timer, next); + timer_mod(timer, next); /* If we set a negative value and the decrementer was positive, raise an * exception. @@ -776,7 +776,7 @@ static void cpu_ppc_store_purr(PowerPCCPU *cpu, uint64_t value) ppc_tb_t *tb_env = cpu->env.tb_env; tb_env->purr_load = value; - tb_env->purr_start = qemu_get_clock_ns(vm_clock); + tb_env->purr_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq) @@ -806,11 +806,11 @@ clk_setup_cb cpu_ppc_tb_init (CPUPPCState *env, uint32_t freq) env->tb_env = tb_env; tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED; /* Create new timer */ - tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_decr_cb, cpu); + tb_env->decr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &cpu_ppc_decr_cb, cpu); if (0) { /* XXX: find a suitable condition to enable the hypervisor decrementer */ - tb_env->hdecr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_hdecr_cb, + tb_env->hdecr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &cpu_ppc_hdecr_cb, cpu); } else { tb_env->hdecr_timer = NULL; @@ -877,7 +877,7 @@ static void cpu_4xx_fit_cb (void *opaque) cpu = ppc_env_get_cpu(env); tb_env = env->tb_env; ppc40x_timer = tb_env->opaque; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); switch ((env->spr[SPR_40x_TCR] >> 24) & 0x3) { case 0: next = 1 << 9; @@ -898,7 +898,7 @@ static void cpu_4xx_fit_cb (void *opaque) next = now + muldiv64(next, get_ticks_per_sec(), tb_env->tb_freq); if (next == now) next++; - qemu_mod_timer(ppc40x_timer->fit_timer, next); + timer_mod(ppc40x_timer->fit_timer, next); env->spr[SPR_40x_TSR] |= 1 << 26; if ((env->spr[SPR_40x_TCR] >> 23) & 0x1) { ppc_set_irq(cpu, PPC_INTERRUPT_FIT, 1); @@ -920,18 +920,18 @@ static void start_stop_pit (CPUPPCState *env, ppc_tb_t *tb_env, int is_excp) (is_excp && !((env->spr[SPR_40x_TCR] >> 22) & 0x1))) { /* Stop PIT */ LOG_TB("%s: stop PIT\n", __func__); - qemu_del_timer(tb_env->decr_timer); + timer_del(tb_env->decr_timer); } else { LOG_TB("%s: start PIT %016" PRIx64 "\n", __func__, ppc40x_timer->pit_reload); - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); next = now + muldiv64(ppc40x_timer->pit_reload, get_ticks_per_sec(), tb_env->decr_freq); if (is_excp) next += tb_env->decr_next - now; if (next == now) next++; - qemu_mod_timer(tb_env->decr_timer, next); + timer_mod(tb_env->decr_timer, next); tb_env->decr_next = next; } } @@ -973,7 +973,7 @@ static void cpu_4xx_wdt_cb (void *opaque) cpu = ppc_env_get_cpu(env); tb_env = env->tb_env; ppc40x_timer = tb_env->opaque; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); switch ((env->spr[SPR_40x_TCR] >> 30) & 0x3) { case 0: next = 1 << 17; @@ -999,12 +999,12 @@ static void cpu_4xx_wdt_cb (void *opaque) switch ((env->spr[SPR_40x_TSR] >> 30) & 0x3) { case 0x0: case 0x1: - qemu_mod_timer(ppc40x_timer->wdt_timer, next); + timer_mod(ppc40x_timer->wdt_timer, next); ppc40x_timer->wdt_next = next; env->spr[SPR_40x_TSR] |= 1 << 31; break; case 0x2: - qemu_mod_timer(ppc40x_timer->wdt_timer, next); + timer_mod(ppc40x_timer->wdt_timer, next); ppc40x_timer->wdt_next = next; env->spr[SPR_40x_TSR] |= 1 << 30; if ((env->spr[SPR_40x_TCR] >> 27) & 0x1) { @@ -1076,11 +1076,11 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq, LOG_TB("%s freq %" PRIu32 "\n", __func__, freq); if (ppc40x_timer != NULL) { /* We use decr timer for PIT */ - tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_4xx_pit_cb, env); + tb_env->decr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &cpu_4xx_pit_cb, env); ppc40x_timer->fit_timer = - qemu_new_timer_ns(vm_clock, &cpu_4xx_fit_cb, env); + timer_new_ns(QEMU_CLOCK_VIRTUAL, &cpu_4xx_fit_cb, env); ppc40x_timer->wdt_timer = - qemu_new_timer_ns(vm_clock, &cpu_4xx_wdt_cb, env); + timer_new_ns(QEMU_CLOCK_VIRTUAL, &cpu_4xx_wdt_cb, env); ppc40x_timer->decr_excp = decr_excp; } diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 290f71ab69..0ef5254cd7 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1348,7 +1348,7 @@ static uint32_t ppc4xx_gpt_readl (void *opaque, hwaddr addr) switch (addr) { case 0x00: /* Time base counter */ - ret = muldiv64(qemu_get_clock_ns(vm_clock) + gpt->tb_offset, + ret = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + gpt->tb_offset, gpt->tb_freq, get_ticks_per_sec()); break; case 0x10: @@ -1405,7 +1405,7 @@ static void ppc4xx_gpt_writel (void *opaque, case 0x00: /* Time base counter */ gpt->tb_offset = muldiv64(value, get_ticks_per_sec(), gpt->tb_freq) - - qemu_get_clock_ns(vm_clock); + - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ppc4xx_gpt_compute_timer(gpt); break; case 0x10: @@ -1476,7 +1476,7 @@ static void ppc4xx_gpt_reset (void *opaque) int i; gpt = opaque; - qemu_del_timer(gpt->timer); + timer_del(gpt->timer); gpt->oe = 0x00000000; gpt->ol = 0x00000000; gpt->im = 0x00000000; @@ -1497,7 +1497,7 @@ static void ppc4xx_gpt_init(hwaddr base, qemu_irq irqs[5]) for (i = 0; i < 5; i++) { gpt->irqs[i] = irqs[i]; } - gpt->timer = qemu_new_timer_ns(vm_clock, &ppc4xx_gpt_cb, gpt); + gpt->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &ppc4xx_gpt_cb, gpt); #ifdef DEBUG_GPT printf("%s: offset " TARGET_FMT_plx "\n", __func__, base); #endif diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c index 000c27f2e8..8bbfc728de 100644 --- a/hw/ppc/ppc_booke.c +++ b/hw/ppc/ppc_booke.c @@ -136,7 +136,7 @@ static void booke_update_fixed_timer(CPUPPCState *env, uint64_t period; uint64_t now; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); tb = cpu_ppc_get_tb(tb_env, now, tb_env->tb_offset); period = 1ULL << target_bit; delta_tick = period - (tb & (period - 1)); @@ -167,7 +167,7 @@ static void booke_update_fixed_timer(CPUPPCState *env, (*next)++; } - qemu_mod_timer(timer, *next); + timer_mod(timer, *next); } static void booke_decr_cb(void *opaque) @@ -303,12 +303,12 @@ void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags) tb_env->tb_freq = freq; tb_env->decr_freq = freq; tb_env->opaque = booke_timer; - tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &booke_decr_cb, cpu); + tb_env->decr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &booke_decr_cb, cpu); booke_timer->fit_timer = - qemu_new_timer_ns(vm_clock, &booke_fit_cb, cpu); + timer_new_ns(QEMU_CLOCK_VIRTUAL, &booke_fit_cb, cpu); booke_timer->wdt_timer = - qemu_new_timer_ns(vm_clock, &booke_wdt_cb, cpu); + timer_new_ns(QEMU_CLOCK_VIRTUAL, &booke_wdt_cb, cpu); ret = kvmppc_booke_watchdog_enable(cpu); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 16bfab90b0..4b566aa410 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -789,7 +789,7 @@ static void htab_save_first_pass(QEMUFile *f, sPAPREnvironment *spapr, { int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64; int index = spapr->htab_save_index; - int64_t starttime = qemu_get_clock_ns(rt_clock); + int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); assert(spapr->htab_first_pass); @@ -820,7 +820,7 @@ static void htab_save_first_pass(QEMUFile *f, sPAPREnvironment *spapr, qemu_put_buffer(f, HPTE(spapr->htab, chunkstart), HASH_PTE_SIZE_64 * n_valid); - if ((qemu_get_clock_ns(rt_clock) - starttime) > max_ns) { + if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) { break; } } @@ -841,7 +841,7 @@ static int htab_save_later_pass(QEMUFile *f, sPAPREnvironment *spapr, int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64; int examined = 0, sent = 0; int index = spapr->htab_save_index; - int64_t starttime = qemu_get_clock_ns(rt_clock); + int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); assert(!spapr->htab_first_pass); @@ -886,7 +886,7 @@ static int htab_save_later_pass(QEMUFile *f, sPAPREnvironment *spapr, HASH_PTE_SIZE_64 * n_valid); sent += index - chunkstart; - if (!final && (qemu_get_clock_ns(rt_clock) - starttime) > max_ns) { + if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) { break; } } diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index d2dbddc11e..1483e196cd 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -134,8 +134,8 @@ static void sdhci_raise_insertion_irq(void *opaque) SDHCIState *s = (SDHCIState *)opaque; if (s->norintsts & SDHC_NIS_REMOVE) { - qemu_mod_timer(s->insert_timer, - qemu_get_clock_ns(vm_clock) + SDHC_INSERTION_DELAY); + timer_mod(s->insert_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + SDHC_INSERTION_DELAY); } else { s->prnsts = 0x1ff0000; if (s->norintstsen & SDHC_NISEN_INSERT) { @@ -152,8 +152,8 @@ static void sdhci_insert_eject_cb(void *opaque, int irq, int level) if ((s->norintsts & SDHC_NIS_REMOVE) && level) { /* Give target some time to notice card ejection */ - qemu_mod_timer(s->insert_timer, - qemu_get_clock_ns(vm_clock) + SDHC_INSERTION_DELAY); + timer_mod(s->insert_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + SDHC_INSERTION_DELAY); } else { if (level) { s->prnsts = 0x1ff0000; @@ -186,8 +186,8 @@ static void sdhci_card_readonly_cb(void *opaque, int irq, int level) static void sdhci_reset(SDHCIState *s) { - qemu_del_timer(s->insert_timer); - qemu_del_timer(s->transfer_timer); + timer_del(s->insert_timer); + timer_del(s->transfer_timer); /* Set all registers to 0. Capabilities registers are not cleared * and assumed to always preserve their value, given to them during * initialization */ @@ -764,8 +764,8 @@ static void sdhci_do_adma(SDHCIState *s) } /* we have unfinished business - reschedule to continue ADMA */ - qemu_mod_timer(s->transfer_timer, - qemu_get_clock_ns(vm_clock) + SDHC_TRANSFER_DELAY); + timer_mod(s->transfer_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + SDHC_TRANSFER_DELAY); } /* Perform data transfer according to controller configuration */ @@ -1170,18 +1170,18 @@ static void sdhci_initfn(Object *obj) s->ro_cb = qemu_allocate_irqs(sdhci_card_readonly_cb, s, 1)[0]; sd_set_cb(s->card, s->ro_cb, s->eject_cb); - s->insert_timer = qemu_new_timer_ns(vm_clock, sdhci_raise_insertion_irq, s); - s->transfer_timer = qemu_new_timer_ns(vm_clock, sdhci_do_data_transfer, s); + s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s); + s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_do_data_transfer, s); } static void sdhci_uninitfn(Object *obj) { SDHCIState *s = SDHCI(obj); - qemu_del_timer(s->insert_timer); - qemu_free_timer(s->insert_timer); - qemu_del_timer(s->transfer_timer); - qemu_free_timer(s->transfer_timer); + timer_del(s->insert_timer); + timer_free(s->insert_timer); + timer_del(s->transfer_timer); + timer_free(s->transfer_timer); qemu_free_irqs(&s->eject_cb); qemu_free_irqs(&s->ro_cb); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index a7214a3fc7..50a9f24a2e 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -363,7 +363,7 @@ void cpu_put_timer(QEMUFile *f, CPUTimer *s) qemu_put_be64s(f, &s->disabled_mask); qemu_put_sbe64s(f, &s->clock_offset); - qemu_put_timer(f, s->qtimer); + timer_put(f, s->qtimer); } void cpu_get_timer(QEMUFile *f, CPUTimer *s) @@ -373,7 +373,7 @@ void cpu_get_timer(QEMUFile *f, CPUTimer *s) qemu_get_be64s(f, &s->disabled_mask); qemu_get_sbe64s(f, &s->clock_offset); - qemu_get_timer(f, s->qtimer); + timer_get(f, s->qtimer); } static CPUTimer *cpu_timer_create(const char *name, SPARCCPU *cpu, @@ -387,9 +387,9 @@ static CPUTimer *cpu_timer_create(const char *name, SPARCCPU *cpu, timer->disabled_mask = disabled_mask; timer->disabled = 1; - timer->clock_offset = qemu_get_clock_ns(vm_clock); + timer->clock_offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - timer->qtimer = qemu_new_timer_ns(vm_clock, cb, cpu); + timer->qtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cb, cpu); return timer; } @@ -397,9 +397,9 @@ static CPUTimer *cpu_timer_create(const char *name, SPARCCPU *cpu, static void cpu_timer_reset(CPUTimer *timer) { timer->disabled = 1; - timer->clock_offset = qemu_get_clock_ns(vm_clock); + timer->clock_offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - qemu_del_timer(timer->qtimer); + timer_del(timer->qtimer); } static void main_cpu_reset(void *opaque) @@ -495,7 +495,7 @@ void cpu_tick_set_count(CPUTimer *timer, uint64_t count) uint64_t real_count = count & ~timer->disabled_mask; uint64_t disabled_bit = count & timer->disabled_mask; - int64_t vm_clock_offset = qemu_get_clock_ns(vm_clock) - + int64_t vm_clock_offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - cpu_to_timer_ticks(real_count, timer->frequency); TIMER_DPRINTF("%s set_count count=0x%016lx (%s) p=%p\n", @@ -509,7 +509,7 @@ void cpu_tick_set_count(CPUTimer *timer, uint64_t count) uint64_t cpu_tick_get_count(CPUTimer *timer) { uint64_t real_count = timer_to_cpu_ticks( - qemu_get_clock_ns(vm_clock) - timer->clock_offset, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - timer->clock_offset, timer->frequency); TIMER_DPRINTF("%s get_count count=0x%016lx (%s) p=%p\n", @@ -524,7 +524,7 @@ uint64_t cpu_tick_get_count(CPUTimer *timer) void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit) { - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); uint64_t real_limit = limit & ~timer->disabled_mask; timer->disabled = (limit & timer->disabled_mask) ? 1 : 0; @@ -548,11 +548,11 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit) if (!real_limit) { TIMER_DPRINTF("%s set_limit limit=ZERO - not starting timer\n", timer->name); - qemu_del_timer(timer->qtimer); + timer_del(timer->qtimer); } else if (timer->disabled) { - qemu_del_timer(timer->qtimer); + timer_del(timer->qtimer); } else { - qemu_mod_timer(timer->qtimer, expires); + timer_mod(timer->qtimer, expires); } } diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 92773155d2..8020c9f4b5 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -81,10 +81,10 @@ static void timerblock_reload(TimerBlock *tb, int restart) return; } if (restart) { - tb->tick = qemu_get_clock_ns(vm_clock); + tb->tick = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } tb->tick += (int64_t)tb->count * timerblock_scale(tb); - qemu_mod_timer(tb->timer, tb->tick); + timer_mod(tb->timer, tb->tick); } static void timerblock_tick(void *opaque) @@ -113,7 +113,7 @@ static uint64_t timerblock_read(void *opaque, hwaddr addr, return 0; } /* Slow and ugly, but hopefully won't happen too often. */ - val = tb->tick - qemu_get_clock_ns(vm_clock); + val = tb->tick - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); val /= timerblock_scale(tb); if (val < 0) { val = 0; @@ -140,7 +140,7 @@ static void timerblock_write(void *opaque, hwaddr addr, case 4: /* Counter. */ if ((tb->control & 1) && tb->count) { /* Cancel the previous timer. */ - qemu_del_timer(tb->timer); + timer_del(tb->timer); } tb->count = value; if (tb->control & 1) { @@ -211,7 +211,7 @@ static void timerblock_reset(TimerBlock *tb) tb->status = 0; tb->tick = 0; if (tb->timer) { - qemu_del_timer(tb->timer); + timer_del(tb->timer); } } @@ -248,7 +248,7 @@ static int arm_mptimer_init(SysBusDevice *dev) sysbus_init_mmio(dev, &s->iomem); for (i = 0; i < s->num_cpu; i++) { TimerBlock *tb = &s->timerblock[i]; - tb->timer = qemu_new_timer_ns(vm_clock, timerblock_tick, tb); + tb->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, timerblock_tick, tb); sysbus_init_irq(dev, &tb->irq); memory_region_init_io(&tb->iomem, OBJECT(s), &timerblock_ops, tb, "arm_mptimer_timerblock", 0x20); diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index acfea59779..a47afde23a 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -12,6 +12,7 @@ #include "qemu-common.h" #include "hw/qdev.h" #include "hw/ptimer.h" +#include "qemu/main-loop.h" /* Common timer implementation. */ diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 888f9ce000..a279bced78 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -172,7 +172,7 @@ static void cadence_timer_run(CadenceTimerState *s) event_interval = next_value - (int64_t)s->reg_value; event_interval = (event_interval < 0) ? -event_interval : event_interval; - qemu_mod_timer(s->timer, s->cpu_time + + timer_mod(s->timer, s->cpu_time + cadence_timer_get_ns(s, event_interval)); } @@ -184,7 +184,7 @@ static void cadence_timer_sync(CadenceTimerState *s) (int64_t)s->reg_interval + 1 : 0x10000ULL) << 16; uint64_t old_time = s->cpu_time; - s->cpu_time = qemu_get_clock_ns(vm_clock); + s->cpu_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); DB_PRINT("cpu time: %lld ns\n", (long long)old_time); if (!s->cpu_time_valid || old_time == s->cpu_time) { @@ -401,7 +401,7 @@ static void cadence_timer_init(uint32_t freq, CadenceTimerState *s) cadence_timer_reset(s); - s->timer = qemu_new_timer_ns(vm_clock, cadence_timer_tick, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cadence_timer_tick, s); } static int cadence_ttc_init(SysBusDevice *dev) diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index a38d9e4eb6..aee4990eb1 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -93,7 +93,7 @@ timer_read(void *opaque, hwaddr addr, unsigned int size) r = ptimer_get_count(t->ptimer_t1); break; case R_TIME: - r = qemu_get_clock_ns(vm_clock) / 10; + r = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 10; break; case RW_INTR_MASK: r = t->rw_intr_mask; diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index a8009a4316..86f4fcd3e8 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -54,6 +54,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qemu/main-loop.h" #include "qemu-common.h" #include "hw/ptimer.h" @@ -905,7 +906,7 @@ static void exynos4210_ltick_event(void *opaque) /* raise interrupt if enabled */ if (s->reg.int_enb & L_INT_INTENB_ICNTEIE) { #ifdef DEBUG_MCT - time2[s->id] = qemu_get_clock_ns(vm_clock); + time2[s->id] = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); DPRINTF("local timer[%d] IRQ: %llx\n", s->id, time2[s->id] - time1[s->id]); time1[s->id] = time2[s->id]; diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index a52f0f6c6b..1aa8f4d07a 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "qemu-common.h" +#include "qemu/main-loop.h" #include "hw/ptimer.h" #include "hw/arm/exynos4210.h" diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 7c1055a99c..74c16d6c90 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -25,6 +25,8 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/ptimer.h" +#include "qemu/timer.h" +#include "qemu/main-loop.h" #include "trace.h" diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 648b38362d..fcd22aea59 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -152,7 +152,7 @@ static int deactivating_bit(uint64_t old, uint64_t new, uint64_t mask) static uint64_t hpet_get_ticks(HPETState *s) { - return ns_to_ticks(qemu_get_clock_ns(vm_clock) + s->hpet_offset); + return ns_to_ticks(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->hpet_offset); } /* @@ -233,7 +233,7 @@ static int hpet_post_load(void *opaque, int version_id) HPETState *s = opaque; /* Recalculate the offset between the main counter and guest time */ - s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock); + s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* Push number of timers into capability returned via HPET_ID */ s->capability &= ~HPET_ID_NUM_TIM_MASK; @@ -332,12 +332,12 @@ static void hpet_timer(void *opaque) } } diff = hpet_calculate_diff(t, cur_tick); - qemu_mod_timer(t->qemu_timer, - qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff)); + timer_mod(t->qemu_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (int64_t)ticks_to_ns(diff)); } else if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) { if (t->wrap_flag) { diff = hpet_calculate_diff(t, cur_tick); - qemu_mod_timer(t->qemu_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(t->qemu_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (int64_t)ticks_to_ns(diff)); t->wrap_flag = 0; } @@ -365,13 +365,13 @@ static void hpet_set_timer(HPETTimer *t) t->wrap_flag = 1; } } - qemu_mod_timer(t->qemu_timer, - qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff)); + timer_mod(t->qemu_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (int64_t)ticks_to_ns(diff)); } static void hpet_del_timer(HPETTimer *t) { - qemu_del_timer(t->qemu_timer); + timer_del(t->qemu_timer); update_irq(t, 0); } @@ -567,7 +567,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) { /* Enable main counter and interrupt generation. */ s->hpet_offset = - ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock); + ticks_to_ns(s->hpet_counter) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); for (i = 0; i < s->num_timers; i++) { if ((&s->timer[i])->cmp != ~0ULL) { hpet_set_timer(&s->timer[i]); @@ -726,7 +726,7 @@ static void hpet_realize(DeviceState *dev, Error **errp) } for (i = 0; i < HPET_MAX_TIMERS; i++) { timer = &s->timer[i]; - timer->qemu_timer = qemu_new_timer_ns(vm_clock, hpet_timer, timer); + timer->qemu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hpet_timer, timer); timer->tn = i; timer->state = s; } diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index cd5214064f..cdbf481951 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -51,7 +51,7 @@ static int pit_get_count(PITChannelState *s) uint64_t d; int counter; - d = muldiv64(qemu_get_clock_ns(vm_clock) - s->count_load_time, PIT_FREQ, + d = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->count_load_time, PIT_FREQ, get_ticks_per_sec()); switch(s->mode) { case 0: @@ -85,7 +85,7 @@ static void pit_set_channel_gate(PITCommonState *s, PITChannelState *sc, case 5: if (sc->gate < val) { /* restart counting on rising edge */ - sc->count_load_time = qemu_get_clock_ns(vm_clock); + sc->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); pit_irq_timer_update(sc, sc->count_load_time); } break; @@ -93,7 +93,7 @@ static void pit_set_channel_gate(PITCommonState *s, PITChannelState *sc, case 3: if (sc->gate < val) { /* restart counting on rising edge */ - sc->count_load_time = qemu_get_clock_ns(vm_clock); + sc->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); pit_irq_timer_update(sc, sc->count_load_time); } /* XXX: disable/enable counting */ @@ -106,7 +106,7 @@ static inline void pit_load_count(PITChannelState *s, int val) { if (val == 0) val = 0x10000; - s->count_load_time = qemu_get_clock_ns(vm_clock); + s->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->count = val; pit_irq_timer_update(s, s->count_load_time); } @@ -143,7 +143,7 @@ static void pit_ioport_write(void *opaque, hwaddr addr, /* XXX: add BCD and null count */ s->status = (pit_get_out(s, - qemu_get_clock_ns(vm_clock)) << 7) | + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)) << 7) | (s->rw_mode << 4) | (s->mode << 1) | s->bcd; @@ -260,9 +260,9 @@ static void pit_irq_timer_update(PITChannelState *s, int64_t current_time) #endif s->next_transition_time = expire_time; if (expire_time != -1) - qemu_mod_timer(s->irq_timer, expire_time); + timer_mod(s->irq_timer, expire_time); else - qemu_del_timer(s->irq_timer); + timer_del(s->irq_timer); } static void pit_irq_timer(void *opaque) @@ -281,7 +281,7 @@ static void pit_reset(DeviceState *dev) s = &pit->channels[0]; if (!s->irq_disabled) { - qemu_mod_timer(s->irq_timer, s->next_transition_time); + timer_mod(s->irq_timer, s->next_transition_time); } } @@ -294,10 +294,10 @@ static void pit_irq_control(void *opaque, int n, int enable) if (enable) { s->irq_disabled = 0; - pit_irq_timer_update(s, qemu_get_clock_ns(vm_clock)); + pit_irq_timer_update(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } else { s->irq_disabled = 1; - qemu_del_timer(s->irq_timer); + timer_del(s->irq_timer); } } @@ -316,9 +316,9 @@ static void pit_post_load(PITCommonState *s) PITChannelState *sc = &s->channels[0]; if (sc->next_transition_time != -1) { - qemu_mod_timer(sc->irq_timer, sc->next_transition_time); + timer_mod(sc->irq_timer, sc->next_transition_time); } else { - qemu_del_timer(sc->irq_timer); + timer_del(sc->irq_timer); } } @@ -330,7 +330,7 @@ static void pit_realizefn(DeviceState *dev, Error **err) s = &pit->channels[0]; /* the timer 0 is connected to an IRQ */ - s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s); + s->irq_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pit_irq_timer, s); qdev_init_gpio_out(dev, &s->irq, 1); memory_region_init_io(&pit->ioports, OBJECT(pit), &pit_ioport_ops, diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c index 4e5bf0b63c..e8fb971488 100644 --- a/hw/timer/i8254_common.c +++ b/hw/timer/i8254_common.c @@ -136,7 +136,7 @@ void pit_get_channel_info_common(PITCommonState *s, PITChannelState *sc, info->gate = sc->gate; info->mode = sc->mode; info->initial_count = sc->count; - info->out = pit_get_out(sc, qemu_get_clock_ns(vm_clock)); + info->out = pit_get_out(sc, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } void pit_get_channel_info(ISADevice *dev, int channel, PITChannelInfo *info) @@ -157,7 +157,7 @@ void pit_reset_common(PITCommonState *pit) s = &pit->channels[i]; s->mode = 3; s->gate = (i != 2); - s->count_load_time = qemu_get_clock_ns(vm_clock); + s->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->count = 0x10000; if (i == 0 && !s->irq_disabled) { s->next_transition_time = diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index dc73d6525d..0dbe15c99b 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -18,6 +18,7 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" #include "hw/arm/imx.h" +#include "qemu/main-loop.h" #define TYPE_IMX_EPIT "imx.epit" diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 87db0e195c..f2d1975e70 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -18,6 +18,7 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" #include "hw/arm/imx.h" +#include "qemu/main-loop.h" #define TYPE_IMX_GPT "imx.gpt" diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index 986e6a19d2..8ed138cc0e 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -27,6 +27,7 @@ #include "qemu/timer.h" #include "hw/ptimer.h" #include "qemu/error-report.h" +#include "qemu/main-loop.h" #define DEFAULT_FREQUENCY (50*1000000) diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c index 0cc9e5b5ee..d3d78ec5a8 100644 --- a/hw/timer/m48t59.c +++ b/hw/timer/m48t59.c @@ -137,7 +137,7 @@ static void alarm_cb (void *opaque) /* Repeat once a second */ next_time = 1; } - qemu_mod_timer(NVRAM->alrm_timer, qemu_get_clock_ns(rtc_clock) + + timer_mod(NVRAM->alrm_timer, qemu_clock_get_ns(rtc_clock) + next_time * 1000); qemu_set_irq(NVRAM->IRQ, 0); } @@ -146,10 +146,10 @@ static void set_alarm(M48t59State *NVRAM) { int diff; if (NVRAM->alrm_timer != NULL) { - qemu_del_timer(NVRAM->alrm_timer); + timer_del(NVRAM->alrm_timer); diff = qemu_timedate_diff(&NVRAM->alarm) - NVRAM->time_offset; if (diff > 0) - qemu_mod_timer(NVRAM->alrm_timer, diff * 1000); + timer_mod(NVRAM->alrm_timer, diff * 1000); } } @@ -188,10 +188,10 @@ static void set_up_watchdog(M48t59State *NVRAM, uint8_t value) NVRAM->buffer[0x1FF0] &= ~0x80; if (NVRAM->wd_timer != NULL) { - qemu_del_timer(NVRAM->wd_timer); + timer_del(NVRAM->wd_timer); if (value != 0) { interval = (1 << (2 * (value & 0x03))) * ((value >> 2) & 0x1F); - qemu_mod_timer(NVRAM->wd_timer, ((uint64_t)time(NULL) * 1000) + + timer_mod(NVRAM->wd_timer, ((uint64_t)time(NULL) * 1000) + ((interval * 1000) >> 4)); } } @@ -609,10 +609,10 @@ static void m48t59_reset_common(M48t59State *NVRAM) NVRAM->addr = 0; NVRAM->lock = 0; if (NVRAM->alrm_timer != NULL) - qemu_del_timer(NVRAM->alrm_timer); + timer_del(NVRAM->alrm_timer); if (NVRAM->wd_timer != NULL) - qemu_del_timer(NVRAM->wd_timer); + timer_del(NVRAM->wd_timer); } static void m48t59_reset_isa(DeviceState *d) @@ -700,8 +700,8 @@ static void m48t59_realize_common(M48t59State *s, Error **errp) { s->buffer = g_malloc0(s->size); if (s->model == 59) { - s->alrm_timer = qemu_new_timer_ns(rtc_clock, &alarm_cb, s); - s->wd_timer = qemu_new_timer_ns(vm_clock, &watchdog_cb, s); + s->alrm_timer = timer_new_ns(rtc_clock, &alarm_cb, s); + s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s); } qemu_get_timedate(&s->alarm, 0); diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index 3c3baaccfa..7230a6e4fa 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -102,7 +102,7 @@ static inline bool rtc_running(RTCState *s) static uint64_t get_guest_rtc_ns(RTCState *s) { uint64_t guest_rtc; - uint64_t guest_clock = qemu_get_clock_ns(rtc_clock); + uint64_t guest_clock = qemu_clock_get_ns(rtc_clock); guest_rtc = s->base_rtc * NSEC_PER_SEC + guest_clock - s->last_update + s->offset; @@ -113,13 +113,13 @@ static uint64_t get_guest_rtc_ns(RTCState *s) static void rtc_coalesced_timer_update(RTCState *s) { if (s->irq_coalesced == 0) { - qemu_del_timer(s->coalesced_timer); + timer_del(s->coalesced_timer); } else { /* divide each RTC interval to 2 - 8 smaller intervals */ int c = MIN(s->irq_coalesced, 7) + 1; - int64_t next_clock = qemu_get_clock_ns(rtc_clock) + + int64_t next_clock = qemu_clock_get_ns(rtc_clock) + muldiv64(s->period / c, get_ticks_per_sec(), RTC_CLOCK_RATE); - qemu_mod_timer(s->coalesced_timer, next_clock); + timer_mod(s->coalesced_timer, next_clock); } } @@ -169,12 +169,12 @@ static void periodic_timer_update(RTCState *s, int64_t current_time) next_irq_clock = (cur_clock & ~(period - 1)) + period; s->next_periodic_time = muldiv64(next_irq_clock, get_ticks_per_sec(), RTC_CLOCK_RATE) + 1; - qemu_mod_timer(s->periodic_timer, s->next_periodic_time); + timer_mod(s->periodic_timer, s->next_periodic_time); } else { #ifdef TARGET_I386 s->irq_coalesced = 0; #endif - qemu_del_timer(s->periodic_timer); + timer_del(s->periodic_timer); } } @@ -222,23 +222,23 @@ static void check_update_timer(RTCState *s) * from occurring, because the time of day is not updated. */ if ((s->cmos_data[RTC_REG_A] & 0x60) == 0x60) { - qemu_del_timer(s->update_timer); + timer_del(s->update_timer); return; } if ((s->cmos_data[RTC_REG_C] & REG_C_UF) && (s->cmos_data[RTC_REG_B] & REG_B_SET)) { - qemu_del_timer(s->update_timer); + timer_del(s->update_timer); return; } if ((s->cmos_data[RTC_REG_C] & REG_C_UF) && (s->cmos_data[RTC_REG_C] & REG_C_AF)) { - qemu_del_timer(s->update_timer); + timer_del(s->update_timer); return; } guest_nsec = get_guest_rtc_ns(s) % NSEC_PER_SEC; /* if UF is clear, reprogram to next second */ - next_update_time = qemu_get_clock_ns(rtc_clock) + next_update_time = qemu_clock_get_ns(rtc_clock) + NSEC_PER_SEC - guest_nsec; /* Compute time of next alarm. One second is already accounted @@ -252,8 +252,8 @@ static void check_update_timer(RTCState *s) * the alarm time. */ next_update_time = s->next_alarm_time; } - if (next_update_time != qemu_timer_expire_time_ns(s->update_timer)) { - qemu_mod_timer(s->update_timer, next_update_time); + if (next_update_time != timer_expire_time_ns(s->update_timer)) { + timer_mod(s->update_timer, next_update_time); } } @@ -371,7 +371,7 @@ static void rtc_update_timer(void *opaque) rtc_update_time(s); s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; - if (qemu_get_clock_ns(rtc_clock) >= s->next_alarm_time) { + if (qemu_clock_get_ns(rtc_clock) >= s->next_alarm_time) { irqs |= REG_C_AF; if (s->cmos_data[RTC_REG_B] & REG_B_AIE) { qemu_system_wakeup_request(QEMU_WAKEUP_REASON_RTC); @@ -445,7 +445,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr, /* UIP bit is read only */ s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) | (s->cmos_data[RTC_REG_A] & REG_A_UIP); - periodic_timer_update(s, qemu_get_clock_ns(rtc_clock)); + periodic_timer_update(s, qemu_clock_get_ns(rtc_clock)); check_update_timer(s); break; case RTC_REG_B: @@ -475,7 +475,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr, qemu_irq_lower(s->irq); } s->cmos_data[RTC_REG_B] = data; - periodic_timer_update(s, qemu_get_clock_ns(rtc_clock)); + periodic_timer_update(s, qemu_clock_get_ns(rtc_clock)); check_update_timer(s); break; case RTC_REG_C: @@ -535,7 +535,7 @@ static void rtc_set_time(RTCState *s) rtc_get_time(s, &tm); s->base_rtc = mktimegm(&tm); - s->last_update = qemu_get_clock_ns(rtc_clock); + s->last_update = qemu_clock_get_ns(rtc_clock); rtc_change_mon_event(&tm); } @@ -587,10 +587,11 @@ static int update_in_progress(RTCState *s) if (!rtc_running(s)) { return 0; } - if (qemu_timer_pending(s->update_timer)) { - int64_t next_update_time = qemu_timer_expire_time_ns(s->update_timer); + if (timer_pending(s->update_timer)) { + int64_t next_update_time = timer_expire_time_ns(s->update_timer); /* Latch UIP until the timer expires. */ - if (qemu_get_clock_ns(rtc_clock) >= (next_update_time - UIP_HOLD_LENGTH)) { + if (qemu_clock_get_ns(rtc_clock) >= + (next_update_time - UIP_HOLD_LENGTH)) { s->cmos_data[RTC_REG_A] |= REG_A_UIP; return 1; } @@ -695,7 +696,7 @@ static void rtc_set_date_from_host(ISADevice *dev) qemu_get_timedate(&tm, 0); s->base_rtc = mktimegm(&tm); - s->last_update = qemu_get_clock_ns(rtc_clock); + s->last_update = qemu_clock_get_ns(rtc_clock); s->offset = 0; /* set the CMOS date */ @@ -843,7 +844,7 @@ static void rtc_realizefn(DeviceState *dev, Error **errp) switch (s->lost_tick_policy) { case LOST_TICK_SLEW: s->coalesced_timer = - qemu_new_timer_ns(rtc_clock, rtc_coalesced_timer, s); + timer_new_ns(rtc_clock, rtc_coalesced_timer, s); break; case LOST_TICK_DISCARD: break; @@ -853,12 +854,13 @@ static void rtc_realizefn(DeviceState *dev, Error **errp) } #endif - s->periodic_timer = qemu_new_timer_ns(rtc_clock, rtc_periodic_timer, s); - s->update_timer = qemu_new_timer_ns(rtc_clock, rtc_update_timer, s); + s->periodic_timer = timer_new_ns(rtc_clock, rtc_periodic_timer, s); + s->update_timer = timer_new_ns(rtc_clock, rtc_update_timer, s); check_update_timer(s); s->clock_reset_notifier.notify = rtc_notify_clock_reset; - qemu_register_clock_reset_notifier(rtc_clock, &s->clock_reset_notifier); + qemu_clock_register_reset_notifier(QEMU_CLOCK_REALTIME, + &s->clock_reset_notifier); s->suspend_notifier.notify = rtc_notify_suspend; qemu_register_suspend_notifier(&s->suspend_notifier); diff --git a/hw/timer/omap_gptimer.c b/hw/timer/omap_gptimer.c index ac389d87ee..016207f626 100644 --- a/hw/timer/omap_gptimer.c +++ b/hw/timer/omap_gptimer.c @@ -103,7 +103,7 @@ static inline uint32_t omap_gp_timer_read(struct omap_gp_timer_s *timer) uint64_t distance; if (timer->st && timer->rate) { - distance = qemu_get_clock_ns(vm_clock) - timer->time; + distance = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - timer->time; distance = muldiv64(distance, timer->rate, timer->ticks_per_sec); if (distance >= 0xffffffff - timer->val) @@ -118,7 +118,7 @@ static inline void omap_gp_timer_sync(struct omap_gp_timer_s *timer) { if (timer->st) { timer->val = omap_gp_timer_read(timer); - timer->time = qemu_get_clock_ns(vm_clock); + timer->time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } } @@ -129,17 +129,17 @@ static inline void omap_gp_timer_update(struct omap_gp_timer_s *timer) if (timer->st && timer->rate) { expires = muldiv64(0x100000000ll - timer->val, timer->ticks_per_sec, timer->rate); - qemu_mod_timer(timer->timer, timer->time + expires); + timer_mod(timer->timer, timer->time + expires); if (timer->ce && timer->match_val >= timer->val) { matches = muldiv64(timer->match_val - timer->val, timer->ticks_per_sec, timer->rate); - qemu_mod_timer(timer->match, timer->time + matches); + timer_mod(timer->match, timer->time + matches); } else - qemu_del_timer(timer->match); + timer_del(timer->match); } else { - qemu_del_timer(timer->timer); - qemu_del_timer(timer->match); + timer_del(timer->timer); + timer_del(timer->match); omap_gp_timer_out(timer, timer->scpwm); } } @@ -164,7 +164,7 @@ static void omap_gp_timer_tick(void *opaque) timer->val = 0; } else { timer->val = timer->load_val; - timer->time = qemu_get_clock_ns(vm_clock); + timer->time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } if (timer->trigger == gpt_trigger_overflow || @@ -406,7 +406,7 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr, break; case 0x28: /* TCRR */ - s->time = qemu_get_clock_ns(vm_clock); + s->time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->val = value; omap_gp_timer_update(s); break; @@ -416,7 +416,7 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr, break; case 0x30: /* TTGR */ - s->time = qemu_get_clock_ns(vm_clock); + s->time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->val = s->load_val; omap_gp_timer_update(s); break; @@ -474,8 +474,8 @@ struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta, s->ta = ta; s->irq = irq; s->clk = fclk; - s->timer = qemu_new_timer_ns(vm_clock, omap_gp_timer_tick, s); - s->match = qemu_new_timer_ns(vm_clock, omap_gp_timer_match, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_gp_timer_tick, s); + s->match = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_gp_timer_match, s); s->in = qemu_allocate_irqs(omap_gp_timer_input, s, 1)[0]; omap_gp_timer_reset(s); omap_gp_timer_clk_setup(s); diff --git a/hw/timer/omap_synctimer.c b/hw/timer/omap_synctimer.c index a12aca20df..8e50488d17 100644 --- a/hw/timer/omap_synctimer.c +++ b/hw/timer/omap_synctimer.c @@ -28,7 +28,7 @@ struct omap_synctimer_s { /* 32-kHz Sync Timer of the OMAP2 */ static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) { - return muldiv64(qemu_get_clock_ns(vm_clock), 0x8000, get_ticks_per_sec()); + return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000, get_ticks_per_sec()); } void omap_synctimer_reset(struct omap_synctimer_s *s) diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c index d5e2f3e265..65928a4819 100644 --- a/hw/timer/pl031.c +++ b/hw/timer/pl031.c @@ -78,7 +78,7 @@ static void pl031_interrupt(void * opaque) static uint32_t pl031_get_count(PL031State *s) { - int64_t now = qemu_get_clock_ns(rtc_clock); + int64_t now = qemu_clock_get_ns(rtc_clock); return s->tick_offset + now / get_ticks_per_sec(); } @@ -91,11 +91,11 @@ static void pl031_set_alarm(PL031State *s) ticks = s->mr - pl031_get_count(s); DPRINTF("Alarm set in %ud ticks\n", ticks); if (ticks == 0) { - qemu_del_timer(s->timer); + timer_del(s->timer); pl031_interrupt(s); } else { - int64_t now = qemu_get_clock_ns(rtc_clock); - qemu_mod_timer(s->timer, now + (int64_t)ticks * get_ticks_per_sec()); + int64_t now = qemu_clock_get_ns(rtc_clock); + timer_mod(s->timer, now + (int64_t)ticks * get_ticks_per_sec()); } } @@ -201,9 +201,10 @@ static int pl031_init(SysBusDevice *dev) sysbus_init_irq(dev, &s->irq); qemu_get_timedate(&tm, 0); - s->tick_offset = mktimegm(&tm) - qemu_get_clock_ns(rtc_clock) / get_ticks_per_sec(); + s->tick_offset = mktimegm(&tm) - + qemu_clock_get_ns(rtc_clock) / get_ticks_per_sec(); - s->timer = qemu_new_timer_ns(rtc_clock, pl031_interrupt, s); + s->timer = timer_new_ns(rtc_clock, pl031_interrupt, s); return 0; } @@ -212,8 +213,8 @@ static void pl031_pre_save(void *opaque) PL031State *s = opaque; /* tick_offset is base_time - rtc_clock base time. Instead, we want to - * store the base time relative to the vm_clock for backwards-compatibility. */ - int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock); + * store the base time relative to the QEMU_CLOCK_VIRTUAL for backwards-compatibility. */ + int64_t delta = qemu_clock_get_ns(rtc_clock) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->tick_offset_vmstate = s->tick_offset + delta / get_ticks_per_sec(); } @@ -221,7 +222,7 @@ static int pl031_post_load(void *opaque, int version_id) { PL031State *s = opaque; - int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock); + int64_t delta = qemu_clock_get_ns(rtc_clock) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->tick_offset = s->tick_offset_vmstate - delta / get_ticks_per_sec(); pl031_set_alarm(s); return 0; diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index 4bd2b76cb8..fa9eefd925 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -10,6 +10,7 @@ */ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qemu/main-loop.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c index cdabccdd15..0f546c4121 100644 --- a/hw/timer/pxa2xx_timer.c +++ b/hw/timer/pxa2xx_timer.c @@ -123,7 +123,7 @@ static void pxa2xx_timer_update(void *opaque, uint64_t now_qemu) for (i = 0; i < 4; i ++) { new_qemu = now_qemu + muldiv64((uint32_t) (s->timer[i].value - now_vm), get_ticks_per_sec(), s->freq); - qemu_mod_timer(s->timer[i].qtimer, new_qemu); + timer_mod(s->timer[i].qtimer, new_qemu); } } @@ -141,7 +141,7 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n) counter = counters[n]; if (!s->tm4[counter].freq) { - qemu_del_timer(s->tm4[n].tm.qtimer); + timer_del(s->tm4[n].tm.qtimer); return; } @@ -151,7 +151,7 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n) new_qemu = now_qemu + muldiv64((uint32_t) (s->tm4[n].tm.value - now_vm), get_ticks_per_sec(), s->tm4[counter].freq); - qemu_mod_timer(s->tm4[n].tm.qtimer, new_qemu); + timer_mod(s->tm4[n].tm.qtimer, new_qemu); } static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset, @@ -188,7 +188,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset, goto badreg; return s->tm4[tm].tm.value; case OSCR: - return s->clock + muldiv64(qemu_get_clock_ns(vm_clock) - + return s->clock + muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->lastload, s->freq, get_ticks_per_sec()); case OSCR11: tm ++; /* fall through */ @@ -211,7 +211,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset, if ((tm == 9 - 4 || tm == 11 - 4) && (s->tm4[tm].control & (1 << 9))) { if (s->tm4[tm - 1].freq) s->snapshot = s->tm4[tm - 1].clock + muldiv64( - qemu_get_clock_ns(vm_clock) - + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->tm4[tm - 1].lastload, s->tm4[tm - 1].freq, get_ticks_per_sec()); else @@ -220,7 +220,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset, if (!s->tm4[tm].freq) return s->tm4[tm].clock; - return s->tm4[tm].clock + muldiv64(qemu_get_clock_ns(vm_clock) - + return s->tm4[tm].clock + muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->tm4[tm].lastload, s->tm4[tm].freq, get_ticks_per_sec()); case OIER: return s->irq_enabled; @@ -271,7 +271,7 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset, /* fall through */ case OSMR0: s->timer[tm].value = value; - pxa2xx_timer_update(s, qemu_get_clock_ns(vm_clock)); + pxa2xx_timer_update(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); break; case OSMR11: tm ++; /* fall through */ @@ -291,11 +291,11 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset, if (!pxa2xx_timer_has_tm4(s)) goto badreg; s->tm4[tm].tm.value = value; - pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm); + pxa2xx_timer_update4(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tm); break; case OSCR: s->oldclock = s->clock; - s->lastload = qemu_get_clock_ns(vm_clock); + s->lastload = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->clock = value; pxa2xx_timer_update(s, s->lastload); break; @@ -317,7 +317,7 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset, if (!pxa2xx_timer_has_tm4(s)) goto badreg; s->tm4[tm].oldclock = s->tm4[tm].clock; - s->tm4[tm].lastload = qemu_get_clock_ns(vm_clock); + s->tm4[tm].lastload = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->tm4[tm].clock = value; pxa2xx_timer_update4(s, s->tm4[tm].lastload, tm); break; @@ -351,7 +351,7 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset, s->tm4[tm].freq = pxa2xx_timer4_freq[value & 7]; else { s->tm4[tm].freq = 0; - pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm); + pxa2xx_timer_update4(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tm); } break; case OMCR11: tm ++; @@ -370,7 +370,7 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset, pxa2xx_timer4_freq[(value & (1 << 8)) ? 0 : (value & 7)]; else { s->tm4[tm].freq = 0; - pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm); + pxa2xx_timer_update4(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), tm); } break; default: @@ -411,7 +411,7 @@ static void pxa2xx_timer_tick4(void *opaque) if (t->control & (1 << 3)) t->clock = 0; if (t->control & (1 << 6)) - pxa2xx_timer_update4(i, qemu_get_clock_ns(vm_clock), t->tm.num - 4); + pxa2xx_timer_update4(i, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), t->tm.num - 4); if (i->events & 0xff0) qemu_irq_raise(i->irq4); } @@ -422,7 +422,7 @@ static int pxa25x_timer_post_load(void *opaque, int version_id) int64_t now; int i; - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); pxa2xx_timer_update(s, now); if (pxa2xx_timer_has_tm4(s)) @@ -440,7 +440,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev) s->irq_enabled = 0; s->oldclock = 0; s->clock = 0; - s->lastload = qemu_get_clock_ns(vm_clock); + s->lastload = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); s->reset3 = 0; for (i = 0; i < 4; i ++) { @@ -448,7 +448,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev) sysbus_init_irq(dev, &s->timer[i].irq); s->timer[i].info = s; s->timer[i].num = i; - s->timer[i].qtimer = qemu_new_timer_ns(vm_clock, + s->timer[i].qtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pxa2xx_timer_tick, &s->timer[i]); } if (s->flags & (1 << PXA2XX_TIMER_HAVE_TM4)) { @@ -460,7 +460,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev) s->tm4[i].tm.num = i + 4; s->tm4[i].freq = 0; s->tm4[i].control = 0x0; - s->tm4[i].tm.qtimer = qemu_new_timer_ns(vm_clock, + s->tm4[i].tm.qtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pxa2xx_timer_tick4, &s->tm4[i]); } } diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index 251a10dbfa..07f0670b5d 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -11,6 +11,7 @@ #include "hw/hw.h" #include "hw/sh4/sh.h" #include "qemu/timer.h" +#include "qemu/main-loop.h" #include "exec/address-spaces.h" #include "hw/ptimer.h" diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 33e8f6c15c..f75b914951 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -27,6 +27,7 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" #include "trace.h" +#include "qemu/main-loop.h" /* * Registers of hardware timer in sun4m. diff --git a/hw/timer/tusb6010.c b/hw/timer/tusb6010.c index c48ecf8ee7..bd2a89e020 100644 --- a/hw/timer/tusb6010.c +++ b/hw/timer/tusb6010.c @@ -516,11 +516,11 @@ static void tusb_async_writew(void *opaque, hwaddr addr, case TUSB_DEV_OTG_TIMER: s->otg_timer_val = value; if (value & TUSB_DEV_OTG_TIMER_ENABLE) - qemu_mod_timer(s->otg_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(s->otg_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + muldiv64(TUSB_DEV_OTG_TIMER_VAL(value), get_ticks_per_sec(), TUSB_DEVCLOCK)); else - qemu_del_timer(s->otg_timer); + timer_del(s->otg_timer); break; case TUSB_PRCM_CONF: @@ -728,8 +728,8 @@ static void tusb6010_power(TUSBState *s, int on) /* Pull the interrupt down after TUSB6010 comes up. */ s->intr_ok = 0; tusb_intr_update(s); - qemu_mod_timer(s->pwr_timer, - qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 2); + timer_mod(s->pwr_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + get_ticks_per_sec() / 2); } } @@ -783,8 +783,8 @@ static int tusb6010_init(SysBusDevice *sbd) DeviceState *dev = DEVICE(sbd); TUSBState *s = TUSB(dev); - s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s); - s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s); + s->otg_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tusb_otg_tick, s); + s->pwr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tusb_power_tick, s); memory_region_init_io(&s->iomem[1], OBJECT(s), &tusb_async_ops, s, "tusb-async", UINT32_MAX); sysbus_init_mmio(sbd, &s->iomem[0]); diff --git a/hw/timer/twl92230.c b/hw/timer/twl92230.c index b730d853f7..f3ea36503c 100644 --- a/hw/timer/twl92230.c +++ b/hw/timer/twl92230.c @@ -72,14 +72,14 @@ static inline void menelaus_update(MenelausState *s) static inline void menelaus_rtc_start(MenelausState *s) { - s->rtc.next += qemu_get_clock_ms(rtc_clock); - qemu_mod_timer(s->rtc.hz_tm, s->rtc.next); + s->rtc.next += qemu_clock_get_ms(rtc_clock); + timer_mod(s->rtc.hz_tm, s->rtc.next); } static inline void menelaus_rtc_stop(MenelausState *s) { - qemu_del_timer(s->rtc.hz_tm); - s->rtc.next -= qemu_get_clock_ms(rtc_clock); + timer_del(s->rtc.hz_tm); + s->rtc.next -= qemu_clock_get_ms(rtc_clock); if (s->rtc.next < 1) s->rtc.next = 1; } @@ -102,7 +102,7 @@ static void menelaus_rtc_hz(void *opaque) s->rtc.next_comp --; s->rtc.alm_sec --; s->rtc.next += 1000; - qemu_mod_timer(s->rtc.hz_tm, s->rtc.next); + timer_mod(s->rtc.hz_tm, s->rtc.next); if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */ menelaus_rtc_update(s); if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec) @@ -782,7 +782,7 @@ static void menelaus_pre_save(void *opaque) { MenelausState *s = opaque; /* Should be <= 1000 */ - s->rtc_next_vmstate = s->rtc.next - qemu_get_clock_ms(rtc_clock); + s->rtc_next_vmstate = s->rtc.next - qemu_clock_get_ms(rtc_clock); } static int menelaus_post_load(void *opaque, int version_id) @@ -843,7 +843,7 @@ static int twl92230_init(I2CSlave *i2c) { MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c); - s->rtc.hz_tm = qemu_new_timer_ms(rtc_clock, menelaus_rtc_hz, s); + s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s); /* Three output pins plus one interrupt pin. */ qdev_init_gpio_out(&i2c->qdev, s->out, 4); diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 5f2c9020ea..6113b975bf 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -25,6 +25,7 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" #include "qemu/log.h" +#include "qemu/main-loop.h" #define D(x) diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index abe384ba9a..6f0a4d2814 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -28,6 +28,7 @@ #include "hw/pci/pci_ids.h" #include "tpm_tis.h" #include "qemu-common.h" +#include "qemu/main-loop.h" /*#define DEBUG_TIS */ diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 010a0d0d32..e5523d54e0 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -150,7 +150,7 @@ typedef enum { #define NLPTR_TYPE_FSTN 3 // frame span traversal node #define SET_LAST_RUN_CLOCK(s) \ - (s)->last_run_ns = qemu_get_clock_ns(vm_clock); + (s)->last_run_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* nifty macros from Arnon's EHCI version */ #define get_field(data, field) \ @@ -958,7 +958,7 @@ static void ehci_reset(void *opaque) } ehci_queues_rip_all(s, 0); ehci_queues_rip_all(s, 1); - qemu_del_timer(s->frame_timer); + timer_del(s->frame_timer); qemu_bh_cancel(s->async_bh); } @@ -2296,7 +2296,7 @@ static void ehci_frame_timer(void *opaque) int uframes, skipped_uframes; int i; - t_now = qemu_get_clock_ns(vm_clock); + t_now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); ns_elapsed = t_now - ehci->last_run_ns; uframes = ns_elapsed / UFRAME_TIMER_NS; @@ -2374,7 +2374,7 @@ static void ehci_frame_timer(void *opaque) expire_time = t_now + (get_ticks_per_sec() * (ehci->async_stepdown+1) / FRAME_TIMER_FREQ); } - qemu_mod_timer(ehci->frame_timer, expire_time); + timer_mod(ehci->frame_timer, expire_time); } } @@ -2527,7 +2527,7 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp) s->ports[i].dev = 0; } - s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s); + s->frame_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ehci_frame_timer, s); s->async_bh = qemu_bh_new(ehci_frame_timer, s); qemu_register_reset(ehci_reset, s); diff --git a/hw/usb/hcd-musb.c b/hw/usb/hcd-musb.c index 7968e17c34..f91aa5580b 100644 --- a/hw/usb/hcd-musb.c +++ b/hw/usb/hcd-musb.c @@ -558,9 +558,9 @@ static void musb_schedule_cb(USBPort *port, USBPacket *packey) return musb_cb_tick(ep); if (!ep->intv_timer[dir]) - ep->intv_timer[dir] = qemu_new_timer_ns(vm_clock, musb_cb_tick, ep); + ep->intv_timer[dir] = timer_new_ns(QEMU_CLOCK_VIRTUAL, musb_cb_tick, ep); - qemu_mod_timer(ep->intv_timer[dir], qemu_get_clock_ns(vm_clock) + + timer_mod(ep->intv_timer[dir], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + muldiv64(timeout, get_ticks_per_sec(), 8000)); } @@ -962,7 +962,7 @@ static void musb_write_fifo(MUSBEndPoint *ep, uint8_t value) static void musb_ep_frame_cancel(MUSBEndPoint *ep, int dir) { if (ep->intv_timer[dir]) - qemu_del_timer(ep->intv_timer[dir]); + timer_del(ep->intv_timer[dir]); } /* Bus control */ diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index d7836d6803..39a25a72e1 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1251,8 +1251,8 @@ static int ohci_service_ed_list(OHCIState *ohci, uint32_t head, int completion) /* Generate a SOF event, and set a timer for EOF */ static void ohci_sof(OHCIState *ohci) { - ohci->sof_time = qemu_get_clock_ns(vm_clock); - qemu_mod_timer(ohci->eof_timer, ohci->sof_time + usb_frame_time); + ohci->sof_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + timer_mod(ohci->eof_timer, ohci->sof_time + usb_frame_time); ohci_set_interrupt(ohci, OHCI_INTR_SF); } @@ -1349,12 +1349,12 @@ static void ohci_frame_boundary(void *opaque) */ static int ohci_bus_start(OHCIState *ohci) { - ohci->eof_timer = qemu_new_timer_ns(vm_clock, + ohci->eof_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ohci_frame_boundary, ohci); if (ohci->eof_timer == NULL) { - fprintf(stderr, "usb-ohci: %s: qemu_new_timer_ns failed\n", ohci->name); + fprintf(stderr, "usb-ohci: %s: timer_new_ns failed\n", ohci->name); ohci_die(ohci); return 0; } @@ -1370,7 +1370,7 @@ static int ohci_bus_start(OHCIState *ohci) static void ohci_bus_stop(OHCIState *ohci) { if (ohci->eof_timer) - qemu_del_timer(ohci->eof_timer); + timer_del(ohci->eof_timer); ohci->eof_timer = NULL; } @@ -1474,7 +1474,7 @@ static uint32_t ohci_get_frame_remaining(OHCIState *ohci) /* Being in USB operational state guarnatees sof_time was * set already. */ - tks = qemu_get_clock_ns(vm_clock) - ohci->sof_time; + tks = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ohci->sof_time; /* avoid muldiv if possible */ if (tks >= usb_frame_time) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index ac8283313e..578b949c92 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -32,6 +32,7 @@ #include "qemu/iov.h" #include "sysemu/dma.h" #include "trace.h" +#include "qemu/main-loop.h" //#define DEBUG //#define DEBUG_DUMP_DATA @@ -432,7 +433,7 @@ static int uhci_post_load(void *opaque, int version_id) UHCIState *s = opaque; if (version_id < 2) { - s->expire_time = qemu_get_clock_ns(vm_clock) + + s->expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / FRAME_TIMER_FREQ); } return 0; @@ -475,9 +476,9 @@ static void uhci_port_write(void *opaque, hwaddr addr, if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) { /* start frame processing */ trace_usb_uhci_schedule_start(); - s->expire_time = qemu_get_clock_ns(vm_clock) + + s->expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / FRAME_TIMER_FREQ); - qemu_mod_timer(s->frame_timer, s->expire_time); + timer_mod(s->frame_timer, s->expire_time); s->status &= ~UHCI_STS_HCHALTED; } else if (!(val & UHCI_CMD_RS)) { s->status |= UHCI_STS_HCHALTED; @@ -1160,7 +1161,7 @@ static void uhci_frame_timer(void *opaque) if (!(s->cmd & UHCI_CMD_RS)) { /* Full stop */ trace_usb_uhci_schedule_stop(); - qemu_del_timer(s->frame_timer); + timer_del(s->frame_timer); uhci_async_cancel_all(s); /* set hchalted bit in status - UHCI11D 2.1.2 */ s->status |= UHCI_STS_HCHALTED; @@ -1169,7 +1170,7 @@ static void uhci_frame_timer(void *opaque) /* We still store expire_time in our state, for migration */ t_last_run = s->expire_time - frame_t; - t_now = qemu_get_clock_ns(vm_clock); + t_now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); /* Process up to MAX_FRAMES_PER_TICK frames */ frames = (t_now - t_last_run) / frame_t; @@ -1203,7 +1204,7 @@ static void uhci_frame_timer(void *opaque) } s->pending_int_mask = 0; - qemu_mod_timer(s->frame_timer, t_now + frame_t); + timer_mod(s->frame_timer, t_now + frame_t); } static const MemoryRegionOps uhci_ioport_ops = { @@ -1260,7 +1261,7 @@ static int usb_uhci_common_initfn(PCIDevice *dev) } } s->bh = qemu_bh_new(uhci_bh, s); - s->frame_timer = qemu_new_timer_ns(vm_clock, uhci_frame_timer, s); + s->frame_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, uhci_frame_timer, s); s->num_ports_vmstate = NB_PORTS; QTAILQ_INIT(&s->queues); diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 58c88b8a6b..be6b86e2ba 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -608,7 +608,7 @@ static const char *event_name(XHCIEvent *event) static uint64_t xhci_mfindex_get(XHCIState *xhci) { - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); return (now - xhci->mfindex_start) / 125000; } @@ -619,12 +619,12 @@ static void xhci_mfwrap_update(XHCIState *xhci) int64_t now; if ((xhci->usbcmd & bits) == bits) { - now = qemu_get_clock_ns(vm_clock); + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; left = 0x4000 - mfindex; - qemu_mod_timer(xhci->mfwrap_timer, now + left * 125000); + timer_mod(xhci->mfwrap_timer, now + left * 125000); } else { - qemu_del_timer(xhci->mfwrap_timer); + timer_del(xhci->mfwrap_timer); } } @@ -1086,7 +1086,7 @@ static void xhci_run(XHCIState *xhci) { trace_usb_xhci_run(); xhci->usbsts &= ~USBSTS_HCH; - xhci->mfindex_start = qemu_get_clock_ns(vm_clock); + xhci->mfindex_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); } static void xhci_stop(XHCIState *xhci) @@ -1229,7 +1229,7 @@ static XHCIEPContext *xhci_alloc_epctx(XHCIState *xhci, for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { usb_packet_init(&epctx->transfers[i].packet); } - epctx->kick_timer = qemu_new_timer_ns(vm_clock, xhci_ep_kick_timer, epctx); + epctx->kick_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_ep_kick_timer, epctx); return epctx; } @@ -1304,7 +1304,7 @@ static int xhci_ep_nuke_one_xfer(XHCITransfer *t) XHCIEPContext *epctx = t->xhci->slots[t->slotid-1].eps[t->epid-1]; if (epctx) { epctx->retry = NULL; - qemu_del_timer(epctx->kick_timer); + timer_del(epctx->kick_timer); } t->running_retry = 0; } @@ -1380,7 +1380,7 @@ static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, xhci_set_ep_state(xhci, epctx, NULL, EP_DISABLED); - qemu_free_timer(epctx->kick_timer); + timer_free(epctx->kick_timer); g_free(epctx); slot->eps[epid-1] = NULL; @@ -1844,12 +1844,12 @@ static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx, uint64_t mfindex) { if (xfer->mfindex_kick > mfindex) { - qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) + + timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (xfer->mfindex_kick - mfindex) * 125000); xfer->running_retry = 1; } else { epctx->mfindex_last = xfer->mfindex_kick; - qemu_del_timer(epctx->kick_timer); + timer_del(epctx->kick_timer); xfer->running_retry = 0; } } @@ -2745,7 +2745,7 @@ static void xhci_reset(DeviceState *dev) xhci->intr[i].ev_buffer_get = 0; } - xhci->mfindex_start = qemu_get_clock_ns(vm_clock); + xhci->mfindex_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); xhci_mfwrap_update(xhci); } @@ -3366,7 +3366,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev) xhci->numslots = 1; } - xhci->mfwrap_timer = qemu_new_timer_ns(vm_clock, xhci_mfwrap_timer, xhci); + xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci); xhci->irq = dev->irq[0]; @@ -3451,7 +3451,7 @@ static int usb_xhci_post_load(void *opaque, int version_id) epctx->state = state; if (state == EP_RUNNING) { /* kick endpoint after vmload is finished */ - qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock)); + timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); } } } diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index f660770076..128955dd92 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -1462,7 +1462,7 @@ static void usb_host_auto_check(void *unused) if (unconnected == 0) { /* nothing to watch */ if (usb_auto_timer) { - qemu_del_timer(usb_auto_timer); + timer_del(usb_auto_timer); trace_usb_host_auto_scan_disabled(); } return; @@ -1474,13 +1474,13 @@ static void usb_host_auto_check(void *unused) usb_vmstate = qemu_add_vm_change_state_handler(usb_host_vm_state, NULL); } if (!usb_auto_timer) { - usb_auto_timer = qemu_new_timer_ms(rt_clock, usb_host_auto_check, NULL); + usb_auto_timer = timer_new_ms(QEMU_CLOCK_REALTIME, usb_host_auto_check, NULL); if (!usb_auto_timer) { return; } trace_usb_host_auto_scan_enabled(); } - qemu_mod_timer(usb_auto_timer, qemu_get_clock_ms(rt_clock) + 2000); + timer_mod(usb_auto_timer, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 2000); } void usb_host_info(Monitor *mon, const QDict *qdict) diff --git a/hw/usb/host-linux.c b/hw/usb/host-linux.c index 7901f4c01a..65cd3b444c 100644 --- a/hw/usb/host-linux.c +++ b/hw/usb/host-linux.c @@ -1754,7 +1754,7 @@ static void usb_host_auto_check(void *unused) if (unconnected == 0) { /* nothing to watch */ if (usb_auto_timer) { - qemu_del_timer(usb_auto_timer); + timer_del(usb_auto_timer); trace_usb_host_auto_scan_disabled(); } return; @@ -1765,13 +1765,13 @@ static void usb_host_auto_check(void *unused) usb_vmstate = qemu_add_vm_change_state_handler(usb_host_vm_state, NULL); } if (!usb_auto_timer) { - usb_auto_timer = qemu_new_timer_ms(rt_clock, usb_host_auto_check, NULL); + usb_auto_timer = timer_new_ms(QEMU_CLOCK_REALTIME, usb_host_auto_check, NULL); if (!usb_auto_timer) { return; } trace_usb_host_auto_scan_enabled(); } - qemu_mod_timer(usb_auto_timer, qemu_get_clock_ms(rt_clock) + 2000); + timer_mod(usb_auto_timer, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 2000); } #ifndef CONFIG_USB_LIBUSB diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index e3b9f324b3..287a505b48 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -1297,7 +1297,7 @@ static int usbredir_initfn(USBDevice *udev) } dev->chardev_close_bh = qemu_bh_new(usbredir_chardev_close_bh, dev); - dev->attach_timer = qemu_new_timer_ms(vm_clock, usbredir_do_attach, dev); + dev->attach_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, usbredir_do_attach, dev); packet_id_queue_init(&dev->cancelled, dev, "cancelled"); packet_id_queue_init(&dev->already_in_flight, dev, "already-in-flight"); @@ -1338,8 +1338,8 @@ static void usbredir_handle_destroy(USBDevice *udev) /* Note must be done after qemu_chr_close, as that causes a close event */ qemu_bh_delete(dev->chardev_close_bh); - qemu_del_timer(dev->attach_timer); - qemu_free_timer(dev->attach_timer); + timer_del(dev->attach_timer); + timer_free(dev->attach_timer); usbredir_cleanup_device_queues(dev); @@ -1493,7 +1493,7 @@ static void usbredir_device_connect(void *priv, USBRedirDevice *dev = priv; const char *speed; - if (qemu_timer_pending(dev->attach_timer) || dev->dev.attached) { + if (timer_pending(dev->attach_timer) || dev->dev.attached) { ERROR("Received device connect while already connected\n"); return; } @@ -1548,7 +1548,7 @@ static void usbredir_device_connect(void *priv, } usbredir_check_bulk_receiving(dev); - qemu_mod_timer(dev->attach_timer, dev->next_attach_time); + timer_mod(dev->attach_timer, dev->next_attach_time); } static void usbredir_device_disconnect(void *priv) @@ -1556,7 +1556,7 @@ static void usbredir_device_disconnect(void *priv) USBRedirDevice *dev = priv; /* Stop any pending attaches */ - qemu_del_timer(dev->attach_timer); + timer_del(dev->attach_timer); if (dev->dev.attached) { DPRINTF("detaching device\n"); @@ -1565,7 +1565,7 @@ static void usbredir_device_disconnect(void *priv) * Delay next usb device attach to give the guest a chance to see * see the detach / attach in case of quick close / open succession */ - dev->next_attach_time = qemu_get_clock_ms(vm_clock) + 200; + dev->next_attach_time = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 200; } /* Reset state so that the next dev connected starts with a clean slate */ @@ -1588,7 +1588,7 @@ static void usbredir_interface_info(void *priv, * If we receive interface info after the device has already been * connected (ie on a set_config), re-check interface dependent things. */ - if (qemu_timer_pending(dev->attach_timer) || dev->dev.attached) { + if (timer_pending(dev->attach_timer) || dev->dev.attached) { usbredir_check_bulk_receiving(dev); if (usbredir_check_filter(dev)) { ERROR("Device no longer matches filter after interface info " diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index aac7f83ccf..9504877120 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -78,8 +78,8 @@ static bool balloon_stats_enabled(const VirtIOBalloon *s) static void balloon_stats_destroy_timer(VirtIOBalloon *s) { if (balloon_stats_enabled(s)) { - qemu_del_timer(s->stats_timer); - qemu_free_timer(s->stats_timer); + timer_del(s->stats_timer); + timer_free(s->stats_timer); s->stats_timer = NULL; s->stats_poll_interval = 0; } @@ -87,7 +87,7 @@ static void balloon_stats_destroy_timer(VirtIOBalloon *s) static void balloon_stats_change_timer(VirtIOBalloon *s, int secs) { - qemu_mod_timer(s->stats_timer, qemu_get_clock_ms(vm_clock) + secs * 1000); + timer_mod(s->stats_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + secs * 1000); } static void balloon_stats_poll_cb(void *opaque) @@ -173,7 +173,7 @@ static void balloon_stats_set_poll_interval(Object *obj, struct Visitor *v, /* create a new timer */ g_assert(s->stats_timer == NULL); - s->stats_timer = qemu_new_timer_ms(vm_clock, balloon_stats_poll_cb, s); + s->stats_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, balloon_stats_poll_cb, s); s->stats_poll_interval = value; balloon_stats_change_timer(s, 0); } diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c index bac8421a20..314e393520 100644 --- a/hw/virtio/virtio-rng.c +++ b/hw/virtio/virtio-rng.c @@ -129,8 +129,8 @@ static void check_rate_limit(void *opaque) vrng->quota_remaining = vrng->conf.max_bytes; virtio_rng_process(vrng); - qemu_mod_timer(vrng->rate_limit_timer, - qemu_get_clock_ms(vm_clock) + vrng->conf.period_ms); + timer_mod(vrng->rate_limit_timer, + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vrng->conf.period_ms); } static int virtio_rng_device_init(VirtIODevice *vdev) @@ -172,11 +172,11 @@ static int virtio_rng_device_init(VirtIODevice *vdev) assert(vrng->conf.max_bytes <= INT64_MAX); vrng->quota_remaining = vrng->conf.max_bytes; - vrng->rate_limit_timer = qemu_new_timer_ms(vm_clock, + vrng->rate_limit_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, check_rate_limit, vrng); - qemu_mod_timer(vrng->rate_limit_timer, - qemu_get_clock_ms(vm_clock) + vrng->conf.period_ms); + timer_mod(vrng->rate_limit_timer, + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vrng->conf.period_ms); register_savevm(qdev, "virtio-rng", -1, 1, virtio_rng_save, virtio_rng_load, vrng); @@ -189,8 +189,8 @@ static int virtio_rng_device_exit(DeviceState *qdev) VirtIORNG *vrng = VIRTIO_RNG(qdev); VirtIODevice *vdev = VIRTIO_DEVICE(qdev); - qemu_del_timer(vrng->rate_limit_timer); - qemu_free_timer(vrng->rate_limit_timer); + timer_del(vrng->rate_limit_timer); + timer_free(vrng->rate_limit_timer); unregister_savevm(qdev, "virtio-rng", vrng); virtio_cleanup(vdev); return 0; diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 2e064bac81..36d38878ee 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -130,7 +130,7 @@ static void i6300esb_restart_timer(I6300State *d, int stage) i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout); - qemu_mod_timer(d->timer, qemu_get_clock_ns(vm_clock) + timeout); + timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); } /* This is called when the guest disables the watchdog. */ @@ -138,7 +138,7 @@ static void i6300esb_disable_timer(I6300State *d) { i6300esb_debug("timer disabled\n"); - qemu_del_timer(d->timer); + timer_del(d->timer); } static void i6300esb_reset(DeviceState *dev) @@ -414,7 +414,7 @@ static int i6300esb_init(PCIDevice *dev) i6300esb_debug("I6300State = %p\n", d); - d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d); + d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d); d->previous_reboot_flag = 0; memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d, diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index e97b4c3049..bc994a4c32 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -62,7 +62,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) ib700_debug("addr = %x, data = %x\n", addr, data); timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); - qemu_mod_timer(s->timer, qemu_get_clock_ns (vm_clock) + timeout); + timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); } /* A write (of any value) to this register disables the timer. */ @@ -72,7 +72,7 @@ static void ib700_write_disable_reg(void *vp, uint32_t addr, uint32_t data) ib700_debug("addr = %x, data = %x\n", addr, data); - qemu_del_timer(s->timer); + timer_del(s->timer); } /* This is called when the watchdog expires. */ @@ -83,7 +83,7 @@ static void ib700_timer_expired(void *vp) ib700_debug("watchdog expired\n"); watchdog_perform_action(); - qemu_del_timer(s->timer); + timer_del(s->timer); } static const VMStateDescription vmstate_ib700 = { @@ -110,7 +110,7 @@ static void wdt_ib700_realize(DeviceState *dev, Error **errp) ib700_debug("watchdog init\n"); - s->timer = qemu_new_timer_ns(vm_clock, ib700_timer_expired, s); + s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ib700_timer_expired, s); portio_list_init(port_list, OBJECT(s), wdt_portio_list, s, "ib700"); portio_list_add(port_list, isa_address_space_io(&s->parent_obj), 0); @@ -122,7 +122,7 @@ static void wdt_ib700_reset(DeviceState *dev) ib700_debug("watchdog reset\n"); - qemu_del_timer(s->timer); + timer_del(s->timer); } static WatchdogTimerModel model = { diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c index 7f015ff5ab..e2005bd981 100644 --- a/hw/xtensa/pic_cpu.c +++ b/hw/xtensa/pic_cpu.c @@ -52,11 +52,11 @@ void check_interrupts(CPUXtensaState *env) uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; int level; - /* If the CPU is halted advance CCOUNT according to the vm_clock time + /* If the CPU is halted advance CCOUNT according to the QEMU_CLOCK_VIRTUAL time * elapsed since the moment when it was advanced last time. */ if (cs->halted) { - int64_t now = qemu_get_clock_ns(vm_clock); + int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); xtensa_advance_ccount(env, muldiv64(now - env->halt_clock, @@ -119,7 +119,7 @@ void xtensa_rearm_ccompare_timer(CPUXtensaState *env) } } env->wake_ccount = wake_ccount; - qemu_mod_timer(env->ccompare_timer, env->halt_clock + + timer_mod(env->ccompare_timer, env->halt_clock + muldiv64(wake_ccount - env->sregs[CCOUNT], 1000000, env->config->clock_freq_khz)); } @@ -131,7 +131,7 @@ static void xtensa_ccompare_cb(void *opaque) CPUState *cs = CPU(cpu); if (cs->halted) { - env->halt_clock = qemu_get_clock_ns(vm_clock); + env->halt_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]); if (!cpu_has_work(cs)) { env->sregs[CCOUNT] = env->wake_ccount + 1; @@ -149,7 +149,7 @@ void xtensa_irq_init(CPUXtensaState *env) if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) && env->config->nccompare > 0) { env->ccompare_timer = - qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu); + timer_new_ns(QEMU_CLOCK_VIRTUAL, &xtensa_ccompare_cb, cpu); } } |