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authorPaolo Bonzini <pbonzini@redhat.com>2015-03-31 14:14:28 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2015-06-05 17:36:39 +0200
commit3de70c0899db2712a5ae321093aa6173d6f76706 (patch)
tree244b55f1c4eb255ac76a595ce43d5e111fc8855f /hw
parentf809c605122df291bbb9004dc487bde0969134b5 (diff)
hw/i386: remove smram_update
It's easier to inline it now that most of its work is done by the CPU (rather than the chipset) through /machine/smram and the memory API. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/pci-host/pam.c6
-rw-r--r--hw/pci-host/piix.c3
-rw-r--r--hw/pci-host/q35.c3
3 files changed, 4 insertions, 8 deletions
diff --git a/hw/pci-host/pam.c b/hw/pci-host/pam.c
index 99d7af97e7..17d826cba5 100644
--- a/hw/pci-host/pam.c
+++ b/hw/pci-host/pam.c
@@ -31,12 +31,6 @@
#include "sysemu/sysemu.h"
#include "hw/pci-host/pam.h"
-void smram_update(MemoryRegion *smram_region, uint8_t smram)
-{
- bool smram_enabled = (smram & SMRAM_D_OPEN);
- memory_region_set_enabled(smram_region, !smram_enabled);
-}
-
void init_pam(DeviceState *dev, MemoryRegion *ram_memory,
MemoryRegion *system_memory, MemoryRegion *pci_address_space,
PAMMemoryRegion *mem, uint32_t start, uint32_t size)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index a91ad73705..f1712b86fe 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -138,7 +138,8 @@ static void i440fx_update_memory_mappings(PCII440FXState *d)
pam_update(&d->pam_regions[i], i,
pd->config[I440FX_PAM + ((i + 1) / 2)]);
}
- smram_update(&d->smram_region, pd->config[I440FX_SMRAM]);
+ memory_region_set_enabled(&d->smram_region,
+ !(pd->config[I440FX_SMRAM] & SMRAM_D_OPEN));
memory_region_set_enabled(&d->smram,
pd->config[I440FX_SMRAM] & SMRAM_G_SMRAME);
memory_region_transaction_commit();
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index eefa199335..24829e0d52 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -268,7 +268,8 @@ static void mch_update_smram(MCHPCIState *mch)
PCIDevice *pd = PCI_DEVICE(mch);
memory_region_transaction_begin();
- smram_update(&mch->smram_region, pd->config[MCH_HOST_BRIDGE_SMRAM]);
+ memory_region_set_enabled(&mch->smram_region,
+ !(pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN));
memory_region_set_enabled(&mch->smram,
pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_G_SMRAME);
memory_region_transaction_commit();