diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2011-09-17 20:30:50 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-09-27 19:16:46 +0000 |
| commit | 46f3069cba94aab44b3b4f87bc270759b4a700fa (patch) | |
| tree | 6f9073a78aaa91f42a559116ec63205d57124866 /hw | |
| parent | 3b7653ac48e6d1edfa4ae2496dbefbe422a94eb6 (diff) | |
PPC: use memory API to construct the PCI hole
Avoid vga.chain4 mapping by constructing a PCI hole for upper
2G of the PCI space.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/grackle_pci.c | 11 | ||||
| -rw-r--r-- | hw/ppc_newworld.c | 2 | ||||
| -rw-r--r-- | hw/ppc_oldworld.c | 2 | ||||
| -rw-r--r-- | hw/unin_pci.c | 18 |
4 files changed, 26 insertions, 7 deletions
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index 9d3ff7d555..94a608ef6d 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -41,6 +41,8 @@ typedef struct GrackleState { SysBusDevice busdev; PCIHostState host_state; + MemoryRegion pci_mmio; + MemoryRegion pci_hole; } GrackleState; /* Don't know if this matches real hardware, but it agrees with OHW. */ @@ -73,11 +75,18 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, qdev_init_nofail(dev); s = sysbus_from_qdev(dev); d = FROM_SYSBUS(GrackleState, s); + + memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio, + 0x80000000ULL, 0x7e000000ULL); + memory_region_add_subregion(address_space_mem, 0x80000000ULL, + &d->pci_hole); + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", pci_grackle_set_irq, pci_grackle_map_irq, pic, - address_space_mem, + &d->pci_mmio, address_space_io, 0, 4); diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c index fbd443d90f..69718cfcdd 100644 --- a/hw/ppc_newworld.c +++ b/hw/ppc_newworld.c @@ -262,8 +262,6 @@ static void ppc_core99_init (ram_addr_t ram_size, } } - isa_mem_base = 0x80000000; - /* Register 8 MB of ISA IO space */ isa_mmio_init(0xf2000000, 0x00800000); diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c index 235d2efc7b..e127d21d58 100644 --- a/hw/ppc_oldworld.c +++ b/hw/ppc_oldworld.c @@ -207,8 +207,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, } } - isa_mem_base = 0x80000000; - /* Register 2 MB of ISA IO space */ isa_mmio_init(0xfe000000, 0x00200000); diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 600cd1e5bd..4299052c5e 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -41,6 +41,8 @@ static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; typedef struct UNINState { SysBusDevice busdev; PCIHostState host_state; + MemoryRegion pci_mmio; + MemoryRegion pci_hole; } UNINState; static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) @@ -215,10 +217,16 @@ PCIBus *pci_pmac_init(qemu_irq *pic, qdev_init_nofail(dev); s = sysbus_from_qdev(dev); d = FROM_SYSBUS(UNINState, s); + memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio, + 0x80000000ULL, 0x70000000ULL); + memory_region_add_subregion(address_space_mem, 0x80000000ULL, + &d->pci_hole); + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", pci_unin_set_irq, pci_unin_map_irq, pic, - address_space_mem, + &d->pci_mmio, address_space_io, PCI_DEVFN(11, 0), 4); @@ -272,10 +280,16 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, s = sysbus_from_qdev(dev); d = FROM_SYSBUS(UNINState, s); + memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio, + 0x80000000ULL, 0x70000000ULL); + memory_region_add_subregion(address_space_mem, 0x80000000ULL, + &d->pci_hole); + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", pci_unin_set_irq, pci_unin_map_irq, pic, - address_space_mem, + &d->pci_mmio, address_space_io, PCI_DEVFN(11, 0), 4); |