diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-12-14 13:30:48 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-12-14 13:30:48 +0000 |
| commit | 3c8133f973767460f8e42c9e656f2f3ed703d00d (patch) | |
| tree | c4c81c69036ee9f15608d4b4cf3ae035a269b09c /hw | |
| parent | 75693e14113c0d1c1ebc1e8405e00879d2a11c84 (diff) | |
Rename cpu_physical_memory_write_rom() to address_space_write_rom()
The API of cpu_physical_memory_write_rom() is odd, because it
takes an AddressSpace, unlike all the other cpu_physical_memory_*
access functions. Rename it to address_space_write_rom(), and
bring its API into line with address_space_write().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 20181122133507.30950-3-peter.maydell@linaro.org
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/core/loader.c | 4 | ||||
| -rw-r--r-- | hw/intc/apic.c | 7 | ||||
| -rw-r--r-- | hw/misc/tz-mpc.c | 2 | ||||
| -rw-r--r-- | hw/sparc/sun4m.c | 5 |
4 files changed, 10 insertions, 8 deletions
diff --git a/hw/core/loader.c b/hw/core/loader.c index aa0b3fc867..66a616608a 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1103,8 +1103,8 @@ static void rom_reset(void *unused) void *host = memory_region_get_ram_ptr(rom->mr); memcpy(host, rom->data, rom->datasize); } else { - cpu_physical_memory_write_rom(rom->as, rom->addr, rom->data, - rom->datasize); + address_space_write_rom(rom->as, rom->addr, MEMTXATTRS_UNSPECIFIED, + rom->data, rom->datasize); } if (rom->isrom) { /* rom needs to be written only once */ diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 97ffdd820f..c9dd65b3a0 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -122,9 +122,10 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type) } vapic_state.irr = vector & 0xff; - cpu_physical_memory_write_rom(&address_space_memory, - s->vapic_paddr + start, - ((void *)&vapic_state) + start, length); + address_space_write_rom(&address_space_memory, + s->vapic_paddr + start, + MEMTXATTRS_UNSPECIFIED, + ((void *)&vapic_state) + start, length); } } diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c index e0c58ba37e..fb48a1540b 100644 --- a/hw/misc/tz-mpc.c +++ b/hw/misc/tz-mpc.c @@ -448,7 +448,7 @@ static int tz_mpc_attrs_to_index(IOMMUMemoryRegion *iommu, MemTxAttrs attrs) { /* We treat unspecified attributes like secure. Transactions with * unspecified attributes come from places like - * cpu_physical_memory_write_rom() for initial image load, and we want + * rom_reset() for initial image load, and we want * those to pass through the from-reset "everything is secure" config. * All the real during-emulation transactions from the CPU will * specify attributes. diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 3c29b68e67..639906cca3 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -559,8 +559,9 @@ static void idreg_init(hwaddr addr) s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, addr); - cpu_physical_memory_write_rom(&address_space_memory, - addr, idreg_data, sizeof(idreg_data)); + address_space_write_rom(&address_space_memory, addr, + MEMTXATTRS_UNSPECIFIED, + idreg_data, sizeof(idreg_data)); } #define MACIO_ID_REGISTER(obj) \ |