diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-18 00:30:29 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-18 00:30:29 +0000 |
commit | 33d68b5f00011c8101aec93ba1bb2b470e35151d (patch) | |
tree | df41613ca2a6c811fcc0289ba6a16f2fce476dc3 /hw | |
parent | e24ad6f140f23e1edc1646ea248819698b77f0e2 (diff) |
MIPS -cpu selection support, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/mips_malta.c | 12 | ||||
-rw-r--r-- | hw/mips_r4k.c | 14 |
2 files changed, 25 insertions, 1 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c index d137658fbd..b215cd58a8 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -626,8 +626,20 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device, /* fdctrl_t *floppy_controller; */ MaltaFPGAState *malta_fpga; int ret; + mips_def_t *def; + /* init CPUs */ + if (cpu_model == NULL) { +#ifdef MIPS_HAS_MIPS64 + cpu_model = "R4000"; +#else + cpu_model = "4KEc"; +#endif + } + if (mips_find_by_name(cpu_model, &def) != 0) + def = NULL; env = cpu_init(); + cpu_mips_register(env, def); register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 2a3b15af68..7709418c00 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -138,8 +138,20 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, CPUState *env; RTCState *rtc_state; int i; + mips_def_t *def; + /* init CPUs */ + if (cpu_model == NULL) { +#ifdef MIPS_HAS_MIPS64 + cpu_model = "R4000"; +#else + cpu_model = "4KEc"; +#endif + } + if (mips_find_by_name(cpu_model, &def) != 0) + def = NULL; env = cpu_init(); + cpu_mips_register(env, def); register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); @@ -148,7 +160,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, if (!mips_qemu_iomemtype) { mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read, - mips_qemu_write, NULL); + mips_qemu_write, NULL); } cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype); |