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authorPeter Maydell <peter.maydell@linaro.org>2022-12-14 14:27:12 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-15 11:18:20 +0000
commit823300f0fc7d374a887a4bc65f340688738de71c (patch)
tree7543368cd1dcec4fa73cad41928e51dbf7cff54c /hw
parent183cac319e783bc6b7fa57904d67d28b0500c855 (diff)
hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset
Convert the TYPE_KVM_ARM_GICV3 device to 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221109161444.3397405-7-peter.maydell@linaro.org
Diffstat (limited to 'hw')
-rw-r--r--hw/intc/arm_gicv3_kvm.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 3ca643ecba..72ad916d3d 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -77,7 +77,7 @@ DECLARE_OBJ_CHECKERS(GICv3State, KVMARMGICv3Class,
struct KVMARMGICv3Class {
ARMGICv3CommonClass parent_class;
DeviceRealize parent_realize;
- void (*parent_reset)(DeviceState *dev);
+ ResettablePhases parent_phases;
};
static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
@@ -703,14 +703,16 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)
c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS];
}
-static void kvm_arm_gicv3_reset(DeviceState *dev)
+static void kvm_arm_gicv3_reset_hold(Object *obj)
{
- GICv3State *s = ARM_GICV3_COMMON(dev);
+ GICv3State *s = ARM_GICV3_COMMON(obj);
KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
DPRINTF("Reset\n");
- kgc->parent_reset(dev);
+ if (kgc->parent_phases.hold) {
+ kgc->parent_phases.hold(obj);
+ }
if (s->migration_blocker) {
DPRINTF("Cannot put kernel gic state, no kernel interface\n");
@@ -890,6 +892,7 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
@@ -897,7 +900,8 @@ static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
agcc->post_load = kvm_arm_gicv3_put;
device_class_set_parent_realize(dc, kvm_arm_gicv3_realize,
&kgc->parent_realize);
- device_class_set_parent_reset(dc, kvm_arm_gicv3_reset, &kgc->parent_reset);
+ resettable_class_set_parent_phases(rc, NULL, kvm_arm_gicv3_reset_hold, NULL,
+ &kgc->parent_phases);
}
static const TypeInfo kvm_arm_gicv3_info = {