aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorSong Gao <gaosong@loongson.cn>2023-04-06 14:57:27 +0800
committerSong Gao <gaosong@loongson.cn>2023-05-15 19:09:33 +0800
commit78464f023b5407c636239de43cef864d76098009 (patch)
treeb8078b71ea9a4dd419d8b2baca8c9fd034e02fa7 /hw
parent7318c62215ac1cf6b4d3c10b267e4cbc37a21f5a (diff)
hw/loongarch/virt: Modify ipi as percpu device
ipi is used to communicate between cpus, this patch modified loongarch ipi device as percpu device, so that there are 2 MemoryRegions with ipi device, rather than 2*cpus MemoryRegions, which may be large than QDEV_MAX_MMIO if more cpus are added on loongarch virt machine. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230512100421.1867848-2-gaosong@loongson.cn>
Diffstat (limited to 'hw')
-rw-r--r--hw/intc/loongarch_ipi.c44
-rw-r--r--hw/loongarch/virt.c12
2 files changed, 22 insertions, 34 deletions
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index 9de7c01e11..054e143842 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -201,55 +201,43 @@ static const MemoryRegionOps loongarch_ipi64_ops = {
static void loongarch_ipi_init(Object *obj)
{
- int cpu;
- LoongArchMachineState *lams;
LoongArchIPI *s = LOONGARCH_IPI(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- Object *machine = qdev_get_machine();
- ObjectClass *mc = object_get_class(machine);
- /* 'lams' should be initialized */
- if (!strcmp(MACHINE_CLASS(mc)->name, "none")) {
- return;
- }
- lams = LOONGARCH_MACHINE(machine);
- for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) {
- memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops,
- &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48);
- /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
- s->ipi_iocsr_mem[cpu].disable_reentrancy_guard = true;
+ memory_region_init_io(&s->ipi_iocsr_mem, obj, &loongarch_ipi_ops,
+ &s->ipi_core, "loongarch_ipi_iocsr", 0x48);
- sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]);
+ /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
+ s->ipi_iocsr_mem.disable_reentrancy_guard = true;
- memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops,
- &lams->ipi_core[cpu], "loongarch_ipi64_iocsr", 0x118);
- sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem[cpu]);
- qdev_init_gpio_out(DEVICE(obj), &lams->ipi_core[cpu].irq, 1);
- }
+ sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
+
+ memory_region_init_io(&s->ipi64_iocsr_mem, obj, &loongarch_ipi64_ops,
+ &s->ipi_core, "loongarch_ipi64_iocsr", 0x118);
+ sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
+ qdev_init_gpio_out(DEVICE(obj), &s->ipi_core.irq, 1);
}
static const VMStateDescription vmstate_ipi_core = {
.name = "ipi-single",
- .version_id = 0,
- .minimum_version_id = 0,
+ .version_id = 1,
+ .minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(status, IPICore),
VMSTATE_UINT32(en, IPICore),
VMSTATE_UINT32(set, IPICore),
VMSTATE_UINT32(clear, IPICore),
- VMSTATE_UINT32_ARRAY(buf, IPICore, MAX_IPI_MBX_NUM * 2),
+ VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
VMSTATE_END_OF_LIST()
}
};
static const VMStateDescription vmstate_loongarch_ipi = {
.name = TYPE_LOONGARCH_IPI,
- .version_id = 0,
- .minimum_version_id = 0,
+ .version_id = 1,
+ .minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_STRUCT_ARRAY(ipi_core, LoongArchMachineState,
- MAX_IPI_CORE_NUM, 0,
- vmstate_ipi_core, IPICore),
+ VMSTATE_STRUCT(ipi_core, LoongArchIPI, 0, vmstate_ipi_core, IPICore),
VMSTATE_END_OF_LIST()
}
};
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index f4bf14c1c8..c8a01b1fb6 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -565,9 +565,6 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
CPUState *cpu_state;
int cpu, pin, i, start, num;
- ipi = qdev_new(TYPE_LOONGARCH_IPI);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
-
extioi = qdev_new(TYPE_LOONGARCH_EXTIOI);
sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal);
@@ -598,15 +595,18 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
lacpu = LOONGARCH_CPU(cpu_state);
env = &(lacpu->env);
+ ipi = qdev_new(TYPE_LOONGARCH_IPI);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
+
/* connect ipi irq to cpu irq */
- qdev_connect_gpio_out(ipi, cpu, qdev_get_gpio_in(cpudev, IRQ_IPI));
+ qdev_connect_gpio_out(ipi, 0, qdev_get_gpio_in(cpudev, IRQ_IPI));
/* IPI iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2));
+ 0));
memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2 + 1));
+ 1));
/* extioi iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, APIC_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi),