diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-28 21:01:02 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-28 21:01:02 +0000 |
commit | 7b717336e2873fd6d9f178a12549eaa2367d14d0 (patch) | |
tree | e06da771738863c969473e57efb0130c28ff8a86 /hw | |
parent | 6e473128b61901441fa2889dfa2079881895a9f9 (diff) |
SMBus support for MIPS Malta.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2893 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/acpi.c | 5 | ||||
-rw-r--r-- | hw/mips_malta.c | 17 | ||||
-rw-r--r-- | hw/pc.c | 2 |
3 files changed, 15 insertions, 9 deletions
@@ -24,7 +24,6 @@ #define PM_FREQ 3579545 #define ACPI_DBG_IO_ADDR 0xb044 -#define SMB_IO_BASE 0xb100 typedef struct PIIX4PMState { PCIDevice dev; @@ -451,11 +450,10 @@ static int pm_load(QEMUFile* f,void* opaque,int version_id) return 0; } -i2c_bus *piix4_pm_init(PCIBus *bus, int devfn) +i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base) { PIIX4PMState *s; uint8_t *pci_conf; - uint32_t smb_io_base; s = (PIIX4PMState *)pci_register_device(bus, "PM", sizeof(PIIX4PMState), @@ -486,7 +484,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn) pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) | (serial_hds[1] != NULL ? 0x90 : 0); - smb_io_base = SMB_IO_BASE; pci_conf[0x90] = smb_io_base | 1; pci_conf[0x91] = smb_io_base >> 8; pci_conf[0xd2] = 0x09; diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 82ba809522..6339cc9419 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -775,6 +775,10 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device, int ret; mips_def_t *def; qemu_irq *i8259; + int piix4_devfn; + uint8_t *eeprom_buf; + i2c_bus *smbus; + int i; /* init CPUs */ if (cpu_model == NULL) { @@ -843,10 +847,15 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device, pci_bus = pci_gt64120_init(i8259); /* Southbridge */ - piix4_init(pci_bus, 80); - pci_piix3_ide_init(pci_bus, bs_table, 81, i8259); - usb_uhci_init(pci_bus, 82); - piix4_pm_init(pci_bus, 83); + piix4_devfn = piix4_init(pci_bus, 80); + pci_piix3_ide_init(pci_bus, bs_table, piix4_devfn + 1, i8259); + usb_uhci_init(pci_bus, piix4_devfn + 2); + smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100); + eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ + for (i = 0; i < 8; i++) { + /* TODO: Populate SPD eeprom data. */ + smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); + } pit = pit_init(0x40, i8259[0]); DMA_init(0); @@ -905,7 +905,7 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, i2c_bus *smbus; /* TODO: Populate SPD eeprom data. */ - smbus = piix4_pm_init(pci_bus, piix3_devfn + 3); + smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100); for (i = 0; i < 8; i++) { smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); } |