diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-08-04 13:03:58 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2017-08-04 13:03:58 +0100 |
commit | c233a35d3d91af666aa95a6a3ba8244d4ce728c6 (patch) | |
tree | 42a0ae3ab0fb3b6beb861d598dab5d92eee728cf /hw | |
parent | 8377e9f60959dd6e0562cf67027c5c370d7d9f06 (diff) | |
parent | d673a68db6963e86536b125af464bb6ed03eba33 (diff) |
Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170803' into staging
MIPS patches 2017-08-03
Changes:
KVM T&E segment support for TCG
malta: leave space for the bootmap after the initrd
Apply CP0.PageMask before writing into TLB entry
Fix fallout from indirect branch optimisation
# gpg: Signature made Thu 03 Aug 2017 15:32:59 BST
# gpg: using RSA key 0x2238EB86D5F797C2
# gpg: Good signature from "Yongbok Kim <yongbok.kim@imgtec.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 8600 4CF5 3415 A5D9 4CFA 2B5C 2238 EB86 D5F7 97C2
* remotes/yongbok/tags/mips-20170803:
target/mips: Fix RDHWR CC with icount
target/mips: Drop redundant gen_io_start/stop()
target/mips: Use BS_EXCP where interrupts are expected
target-mips: apply CP0.PageMask before writing into TLB entry
mips: Add KVM T&E segment support for TCG
mips: Improve segment defs for KVM T&E guests
mips/malta: leave space for the bootmap after the initrd
target-mips: Don't stop on [d]mtc0 DESAVE/KScratch
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/mips/addr.c | 12 | ||||
-rw-r--r-- | hw/mips/mips_malta.c | 22 |
2 files changed, 23 insertions, 11 deletions
diff --git a/hw/mips/addr.c b/hw/mips/addr.c index e4e86b4a75..4da46e1731 100644 --- a/hw/mips/addr.c +++ b/hw/mips/addr.c @@ -24,6 +24,8 @@ #include "hw/hw.h" #include "hw/mips/cpudevs.h" +static int mips_um_ksegs; + uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr) { return addr & 0x1fffffffll; @@ -38,3 +40,13 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr) { return addr | 0x40000000ll; } + +bool mips_um_ksegs_enabled(void) +{ + return mips_um_ksegs; +} + +void mips_um_ksegs_enable(void) +{ + mips_um_ksegs = 1; +} diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 8ecd544baa..af678f5784 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -818,23 +818,20 @@ static int64_t load_kernel (void) exit(1); } - /* Sanity check where the kernel has been linked */ - if (kvm_enabled()) { - if (kernel_entry & 0x80000000ll) { + /* Check where the kernel has been linked */ + if (kernel_entry & 0x80000000ll) { + if (kvm_enabled()) { error_report("KVM guest kernels must be linked in useg. " "Did you forget to enable CONFIG_KVM_GUEST?"); exit(1); } - xlate_to_kseg0 = cpu_mips_kvm_um_phys_to_kseg0; + xlate_to_kseg0 = cpu_mips_phys_to_kseg0; } else { - if (!(kernel_entry & 0x80000000ll)) { - error_report("KVM guest kernels aren't supported with TCG. " - "Did you unintentionally enable CONFIG_KVM_GUEST?"); - exit(1); - } + /* if kernel entry is in useg it is probably a KVM T&E kernel */ + mips_um_ksegs_enable(); - xlate_to_kseg0 = cpu_mips_phys_to_kseg0; + xlate_to_kseg0 = cpu_mips_kvm_um_phys_to_kseg0; } /* load initrd */ @@ -843,7 +840,10 @@ static int64_t load_kernel (void) if (loaderparams.initrd_filename) { initrd_size = get_image_size (loaderparams.initrd_filename); if (initrd_size > 0) { - initrd_offset = (loaderparams.ram_low_size - initrd_size + /* The kernel allocates the bootmap memory in the low memory after + the initrd. It takes at most 128kiB for 2GB RAM and 4kiB + pages. */ + initrd_offset = (loaderparams.ram_low_size - initrd_size - 131072 - ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; if (kernel_high >= initrd_offset) { fprintf(stderr, |