diff options
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-06-11 10:57:41 +1000 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-06-18 09:44:59 +0200 |
| commit | 37a011e9bade7bcbdd41addffc7c94cbf628404c (patch) | |
| tree | 603b3904efd1de480bd0f8d552976925669fb340 /hw | |
| parent | 21a885a7e2a0f532f7653a2607efddbd83504430 (diff) | |
microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ
The UART IRQ is edge sensitive, whereas the machine was registering it
as level sensitive. Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index 7c258f03af..b3bcd4ea5e 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -97,7 +97,7 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args) 1, 0x89, 0x18, 0x0000, 0x0, 1); cpu_irq = microblaze_pic_init_cpu(env); - dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 2); + dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 0xA); for (i = 0; i < 32; i++) { irq[i] = qdev_get_gpio_in(dev, i); } |