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authorStefan Hajnoczi <stefanha@redhat.com>2015-07-08 15:10:09 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-07-20 17:01:00 +0100
commit13566fe3e584e7b14a6f45246976b91677dc2a77 (patch)
tree5d62375ef4c36a58db30feef2a65c7bcadfa44f7 /hw
parentdcc8a3ab632d0f11a1bf3b08381cf0f93e616b9f (diff)
timer: rename NSEC_PER_SEC due to Mac OS X header clash
Commit e0cf11f31c24cfb17f44ed46c254d84c78e7f6e9 ("timer: Use a single definition of NSEC_PER_SEC for the whole codebase") renamed NANOSECONDS_PER_SECOND to NSEC_PER_SEC. On Mac OS X there is a <dispatch/time.h> system header which also defines NSEC_PER_SEC. This causes compiler warnings. Let's use the old name instead. It's longer but it doesn't clash. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1436364609-7929-1-git-send-email-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/ppc.c5
-rw-r--r--hw/ppc/spapr_rtc.c8
-rw-r--r--hw/timer/mc146818rtc.c18
-rw-r--r--hw/usb/hcd-ehci.c2
4 files changed, 18 insertions, 15 deletions
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 2a4b8e18b3..b77e30357a 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -873,8 +873,9 @@ static int timebase_post_load(void *opaque, int version_id)
*/
host_ns = qemu_clock_get_ns(QEMU_CLOCK_HOST);
ns_diff = MAX(0, host_ns - tb_remote->time_of_the_day_ns);
- migration_duration_ns = MIN(NSEC_PER_SEC, ns_diff);
- migration_duration_tb = muldiv64(migration_duration_ns, freq, NSEC_PER_SEC);
+ migration_duration_ns = MIN(NANOSECONDS_PER_SECOND, ns_diff);
+ migration_duration_tb = muldiv64(migration_duration_ns, freq,
+ NANOSECONDS_PER_SECOND);
guest_tb = tb_remote->guest_timebase + MIN(0, migration_duration_tb);
tb_off_adj = guest_tb - cpu_get_real_ticks();
diff --git a/hw/ppc/spapr_rtc.c b/hw/ppc/spapr_rtc.c
index d20b8f270c..34b27db709 100644
--- a/hw/ppc/spapr_rtc.c
+++ b/hw/ppc/spapr_rtc.c
@@ -51,7 +51,7 @@ void spapr_rtc_read(DeviceState *dev, struct tm *tm, uint32_t *ns)
assert(rtc);
guest_ns = host_ns + rtc->ns_offset;
- guest_s = guest_ns / NSEC_PER_SEC;
+ guest_s = guest_ns / NANOSECONDS_PER_SECOND;
if (tm) {
gmtime_r(&guest_s, tm);
@@ -71,7 +71,7 @@ int spapr_rtc_import_offset(DeviceState *dev, int64_t legacy_offset)
rtc = SPAPR_RTC(dev);
- rtc->ns_offset = legacy_offset * NSEC_PER_SEC;
+ rtc->ns_offset = legacy_offset * NANOSECONDS_PER_SECOND;
return 0;
}
@@ -146,7 +146,7 @@ static void rtas_set_time_of_day(PowerPCCPU *cpu, sPAPRMachineState *spapr,
host_ns = qemu_clock_get_ns(rtc_clock);
- rtc->ns_offset = (new_s * NSEC_PER_SEC) - host_ns;
+ rtc->ns_offset = (new_s * NANOSECONDS_PER_SECOND) - host_ns;
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
@@ -168,7 +168,7 @@ static void spapr_rtc_realize(DeviceState *dev, Error **errp)
qemu_get_timedate(&tm, 0);
host_s = mktimegm(&tm);
rtc_ns = qemu_clock_get_ns(rtc_clock);
- rtc->ns_offset = host_s * NSEC_PER_SEC - rtc_ns;
+ rtc->ns_offset = host_s * NANOSECONDS_PER_SECOND - rtc_ns;
object_property_add_tm(OBJECT(rtc), "date", spapr_rtc_qom_date, NULL);
}
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 954c34d6cc..a9f0efd5e0 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -56,7 +56,7 @@
#define RTC_REINJECT_ON_ACK_COUNT 20
#define RTC_CLOCK_RATE 32768
-#define UIP_HOLD_LENGTH (8 * NSEC_PER_SEC / 32768)
+#define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768)
#define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC)
@@ -105,7 +105,7 @@ static uint64_t get_guest_rtc_ns(RTCState *s)
uint64_t guest_rtc;
uint64_t guest_clock = qemu_clock_get_ns(rtc_clock);
- guest_rtc = s->base_rtc * NSEC_PER_SEC
+ guest_rtc = s->base_rtc * NANOSECONDS_PER_SECOND
+ guest_clock - s->last_update + s->offset;
return guest_rtc;
}
@@ -231,16 +231,17 @@ static void check_update_timer(RTCState *s)
return;
}
- guest_nsec = get_guest_rtc_ns(s) % NSEC_PER_SEC;
+ guest_nsec = get_guest_rtc_ns(s) % NANOSECONDS_PER_SECOND;
/* if UF is clear, reprogram to next second */
next_update_time = qemu_clock_get_ns(rtc_clock)
- + NSEC_PER_SEC - guest_nsec;
+ + NANOSECONDS_PER_SECOND - guest_nsec;
/* Compute time of next alarm. One second is already accounted
* for in next_update_time.
*/
next_alarm_sec = get_next_alarm(s);
- s->next_alarm_time = next_update_time + (next_alarm_sec - 1) * NSEC_PER_SEC;
+ s->next_alarm_time = next_update_time +
+ (next_alarm_sec - 1) * NANOSECONDS_PER_SECOND;
if (s->cmos_data[RTC_REG_C] & REG_C_UF) {
/* UF is set, but AF is clear. Program the timer to target
@@ -456,7 +457,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr,
/* if disabling set mode, update the time */
if ((s->cmos_data[RTC_REG_B] & REG_B_SET) &&
(s->cmos_data[RTC_REG_A] & 0x70) <= 0x20) {
- s->offset = get_guest_rtc_ns(s) % NSEC_PER_SEC;
+ s->offset = get_guest_rtc_ns(s) % NANOSECONDS_PER_SECOND;
rtc_set_time(s);
}
}
@@ -580,7 +581,7 @@ static void rtc_update_time(RTCState *s)
int64_t guest_nsec;
guest_nsec = get_guest_rtc_ns(s);
- guest_sec = guest_nsec / NSEC_PER_SEC;
+ guest_sec = guest_nsec / NANOSECONDS_PER_SECOND;
gmtime_r(&guest_sec, &ret);
/* Is SET flag of Register B disabled? */
@@ -608,7 +609,8 @@ static int update_in_progress(RTCState *s)
guest_nsec = get_guest_rtc_ns(s);
/* UIP bit will be set at last 244us of every second. */
- if ((guest_nsec % NSEC_PER_SEC) >= (NSEC_PER_SEC - UIP_HOLD_LENGTH)) {
+ if ((guest_nsec % NANOSECONDS_PER_SECOND) >=
+ (NANOSECONDS_PER_SECOND - UIP_HOLD_LENGTH)) {
return 1;
}
return 0;
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index d7cd40ba12..64a54c6e84 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -32,7 +32,7 @@
#include "trace.h"
#define FRAME_TIMER_FREQ 1000
-#define FRAME_TIMER_NS (NSEC_PER_SEC / FRAME_TIMER_FREQ)
+#define FRAME_TIMER_NS (NANOSECONDS_PER_SECOND / FRAME_TIMER_FREQ)
#define UFRAME_TIMER_NS (FRAME_TIMER_NS / 8)
#define NB_MAXINTRATE 8 // Max rate at which controller issues ints