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authorAaron Lindsay <alindsay@codeaurora.org>2018-04-26 11:04:39 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-04-26 11:04:39 +0100
commit7ece99b17e832065236c07a158dfac62619ef99b (patch)
treecba0e13d676756203e4cd772c6c0a78dcfdcc57d /hw
parent169c893874977eee8303a6dad4a3f25c5464858f (diff)
target/arm: Mask PMU register writes based on PMCR_EL0.N
This is in preparation for enabling counters other than PMCCNTR Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1523997485-1905-5-git-send-email-alindsay@codeaurora.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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