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authorGregory Price <gourry.memverge@gmail.com>2023-02-06 17:28:09 +0000
committerMichael S. Tsirkin <mst@redhat.com>2023-03-02 19:13:52 -0500
commit2ef5063610016a75351fe3cd32879f11323d5927 (patch)
tree158e36b9161c5a7a4ba6bc197dd88953c2aae716 /hw
parent9518d8bc444f63f3925f2a586adfe9010758afa7 (diff)
hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL
Current code sets to STORAGE_EXPRESS and then overrides it. Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Gregory Price <gregory.price@memverge.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230206172816.8201-4-Jonathan.Cameron@huawei.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/mem/cxl_type3.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 252822bd82..217a5e639b 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -408,7 +408,6 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
}
pci_config_set_prog_interface(pci_conf, 0x10);
- pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_CXL);
pcie_endpoint_cap_init(pci_dev, 0x80);
if (ct3d->sn != UI64_NULL) {
@@ -627,7 +626,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
pc->realize = ct3_realize;
pc->exit = ct3_exit;
- pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
+ pc->class_id = PCI_CLASS_MEMORY_CXL;
pc->vendor_id = PCI_VENDOR_ID_INTEL;
pc->device_id = 0xd93; /* LVF for now */
pc->revision = 1;