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authorAlexander Graf <agraf@suse.de>2014-04-03 20:45:27 +0200
committerAlexander Graf <agraf@suse.de>2014-04-08 11:19:59 +0200
commit6a450df9b8369c0cff7a1d6774d56f0862abd4e3 (patch)
tree149f76fe0568fef6efa5b1592e541ad282498965 /hw
parent55519a4b244e4822774b593e36647ecf7598286b (diff)
PPC: E500: Set PIR default reset value rather than SPR value
We now reset SPRs to their reset values on CPU reset. So if we want to have an SPR persistently changed, we need to change its default reset value rather than the value itself manually. Do this for SPR_BOOKE_PIR, fixing e500v2 SMP boot. Reported-by: Frederic Konrad <fred.konrad@greensocs.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: KONRAD Frederic <fred.konrad@greensocs.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/e500.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index d7ba25f379..f984b3e9a9 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -649,7 +649,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
input = (qemu_irq *)env->irq_inputs;
irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT];
irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT];
- env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i;
+ env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
env->mpic_iack = MPC8544_CCSRBAR_BASE +
MPC8544_MPIC_REGS_OFFSET + 0xa0;