diff options
author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-12-01 14:54:47 +0000 |
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committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-12-01 14:54:47 +0000 |
commit | df33e6392ce5c9be330110100c027de3495f4acb (patch) | |
tree | a99fcc81d67aed09f120b3d8ad6367f970252d20 /hw | |
parent | 7debeb82ffad5480c230c116ba17a9c1d8e32016 (diff) |
Improve power management device addressing
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3755 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/slavio_misc.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/hw/slavio_misc.c b/hw/slavio_misc.c index 9658f505d7..d22243bc4d 100644 --- a/hw/slavio_misc.c +++ b/hw/slavio_misc.c @@ -50,6 +50,7 @@ typedef struct MiscState { uint8_t diag, mctrl; uint32_t sysctrl; uint16_t leds; + target_phys_addr_t power_base; } MiscState; #define MISC_SIZE 1 @@ -66,7 +67,6 @@ typedef struct MiscState { #define MISC_DIAG 0x01a00000 #define MISC_MDM 0x01b00000 #define MISC_SYS 0x01f00000 -#define MISC_PWR 0x0a000000 #define AUX2_PWROFF 0x01 #define AUX2_PWRINTCLR 0x02 @@ -145,9 +145,11 @@ static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr, MISC_DPRINTF("Write modem control %2.2x\n", val & 0xff); s->mctrl = val & 0xff; break; - case MISC_PWR: - MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); + default: + if (addr == s->power_base) { + MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); + cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); + } break; } } @@ -178,8 +180,10 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr) ret = s->mctrl; MISC_DPRINTF("Read modem control %2.2x\n", ret); break; - case MISC_PWR: - MISC_DPRINTF("Read power management %2.2x\n", ret); + default: + if (addr == s->power_base) { + MISC_DPRINTF("Read power management %2.2x\n", ret); + } break; } return ret; @@ -363,6 +367,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, slavio_misc_io_memory); // Power management cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory); + s->power_base = power_base; /* 16 bit registers */ slavio_misc_io_memory = cpu_register_io_memory(0, slavio_led_mem_read, |