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authorJean-Christophe Dubois <jcd@tribudubois.net>2020-07-03 16:59:41 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-07-03 16:59:41 +0100
commit461c51ad4275f199d4b6ff400f39701541529e39 (patch)
tree7ad8277951405336bda88c61ff8d2e6b77038430 /hw
parent4abf70a661a5df3886ac9d7c19c3617fa92b922a (diff)
Add a phy-num property to the i.MX FEC emulator
We need a solution to use an Ethernet PHY that is not the first device on the MDIO bus (device 0 on MDIO bus). As an example with the i.MX6UL the NXP SOC has 2 Ethernet devices but only one MDIO bus on which the 2 related PHY are connected but at unique addresses. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: a1a5c0e139d1c763194b8020573dcb6025daeefa.1593296112.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/net/imx_fec.c24
-rw-r--r--hw/net/trace-events4
2 files changed, 19 insertions, 9 deletions
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index eefedc252d..2c14804041 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -280,12 +280,16 @@ static void imx_phy_reset(IMXFECState *s)
static uint32_t imx_phy_read(IMXFECState *s, int reg)
{
uint32_t val;
+ uint32_t phy = reg / 32;
- if (reg > 31) {
- /* we only advertise one phy */
+ if (phy != s->phy_num) {
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s.phy]%s: Bad phy num %u\n",
+ TYPE_IMX_FEC, __func__, phy);
return 0;
}
+ reg %= 32;
+
switch (reg) {
case 0: /* Basic Control */
val = s->phy_control;
@@ -331,20 +335,25 @@ static uint32_t imx_phy_read(IMXFECState *s, int reg)
break;
}
- trace_imx_phy_read(val, reg);
+ trace_imx_phy_read(val, phy, reg);
return val;
}
static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
{
- trace_imx_phy_write(val, reg);
+ uint32_t phy = reg / 32;
- if (reg > 31) {
- /* we only advertise one phy */
+ if (phy != s->phy_num) {
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s.phy]%s: Bad phy num %u\n",
+ TYPE_IMX_FEC, __func__, phy);
return;
}
+ reg %= 32;
+
+ trace_imx_phy_write(val, phy, reg);
+
switch (reg) {
case 0: /* Basic Control */
if (val & 0x8000) {
@@ -926,7 +935,7 @@ static void imx_eth_write(void *opaque, hwaddr offset, uint64_t value,
extract32(value,
18, 10)));
} else {
- /* This a write operation */
+ /* This is a write operation */
imx_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16));
}
/* raise the interrupt as the PHY operation is done */
@@ -1315,6 +1324,7 @@ static void imx_eth_realize(DeviceState *dev, Error **errp)
static Property imx_eth_properties[] = {
DEFINE_NIC_PROPERTIES(IMXFECState, conf),
DEFINE_PROP_UINT32("tx-ring-num", IMXFECState, tx_ring_num, 1),
+ DEFINE_PROP_UINT32("phy-num", IMXFECState, phy_num, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/net/trace-events b/hw/net/trace-events
index e6875c4c0f..5db45456d9 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -413,8 +413,8 @@ i82596_set_multicast(uint16_t count) "Added %d multicast entries"
i82596_channel_attention(void *s) "%p: Received CHANNEL ATTENTION"
# imx_fec.c
-imx_phy_read(uint32_t val, int reg) "0x%04"PRIx32" <= reg[%d]"
-imx_phy_write(uint32_t val, int reg) "0x%04"PRIx32" => reg[%d]"
+imx_phy_read(uint32_t val, int phy, int reg) "0x%04"PRIx32" <= phy[%d].reg[%d]"
+imx_phy_write(uint32_t val, int phy, int reg) "0x%04"PRIx32" => phy[%d].reg[%d]"
imx_phy_update_link(const char *s) "%s"
imx_phy_reset(void) ""
imx_fec_read_bd(uint64_t addr, int flags, int len, int data) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x"