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authorKnut Omang <knut.omang@oracle.com>2019-02-21 19:13:22 +0100
committerMichael S. Tsirkin <mst@redhat.com>2019-03-12 22:31:21 -0400
commitdb891a9ba3b5aef52c2735f9b907d4d3678a86f8 (patch)
tree88a8ea37c10814e33c823325274657aa161cc169 /hw
parenta1fe0b8f273c2272a7964655548179478b9d6a91 (diff)
pcie: Add a simple PCIe ACS (Access Control Services) helper function
Implementing an ACS capability on downstream ports and multifunction endpoints indicates isolation and IOMMU visibility to a finer granularity. This creates smaller IOMMU groups in the guest and thus more flexibility in assigning endpoints to guest userspace or an L2 guest. Signed-off-by: Knut Omang <knut.omang@oracle.com> Message-Id: <07489975121696f5573b0a92baaf3486ef51e35d.1550768238.git-series.knut.omang@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/pci/pcie.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 640f678773..cf1ca30f93 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -914,3 +914,41 @@ void pcie_ats_init(PCIDevice *dev, uint16_t offset)
pci_set_word(dev->wmask + dev->exp.ats_cap + PCI_ATS_CTRL, 0x800f);
}
+
+/* ACS (Access Control Services) */
+void pcie_acs_init(PCIDevice *dev, uint16_t offset)
+{
+ bool is_downstream = pci_is_express_downstream_port(dev);
+ uint16_t cap_bits = 0;
+
+ /* For endpoints, only multifunction devs may have an ACS capability: */
+ assert(is_downstream ||
+ (dev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) ||
+ PCI_FUNC(dev->devfn));
+
+ pcie_add_capability(dev, PCI_EXT_CAP_ID_ACS, PCI_ACS_VER, offset,
+ PCI_ACS_SIZEOF);
+ dev->exp.acs_cap = offset;
+
+ if (is_downstream) {
+ /*
+ * Downstream ports must implement SV, TB, RR, CR, UF, and DT (with
+ * caveats on the latter four that we ignore for simplicity).
+ * Endpoints may also implement a subset of ACS capabilities,
+ * but these are optional if the endpoint does not support
+ * peer-to-peer between functions and thus omitted here.
+ */
+ cap_bits = PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR |
+ PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT;
+ }
+
+ pci_set_word(dev->config + offset + PCI_ACS_CAP, cap_bits);
+ pci_set_word(dev->wmask + offset + PCI_ACS_CTRL, cap_bits);
+}
+
+void pcie_acs_reset(PCIDevice *dev)
+{
+ if (dev->exp.acs_cap) {
+ pci_set_word(dev->config + dev->exp.acs_cap + PCI_ACS_CTRL, 0);
+ }
+}