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authorPatrick Venture <venture@google.com>2021-12-20 13:21:37 -0800
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-03-14 14:48:35 +0100
commit1cbab82e9d1bdb2c7b9ef46a396fdc03ea3fa04c (patch)
tree6158086c0e3a76b58993f03fb390f35e3d0236bc /hw
parent15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4 (diff)
hw/nvram: at24 return 0xff if 1 byte address
The at24 eeproms are 2 byte devices that return 0xff when they are read from with a partial (1-byte) address written. This distinction was found comparing model behavior to real hardware testing. Tested: `i2ctransfer -f -y 45 w1@85 0 r1` returns 0xff instead of next byte Signed-off-by: Patrick Venture <venture@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211220212137.1244511-1-venture@google.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/nvram/eeprom_at24c.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index da435500ba..01a3093600 100644
--- a/hw/nvram/eeprom_at24c.c
+++ b/hw/nvram/eeprom_at24c.c
@@ -58,9 +58,10 @@ int at24c_eeprom_event(I2CSlave *s, enum i2c_event event)
switch (event) {
case I2C_START_SEND:
- case I2C_START_RECV:
case I2C_FINISH:
ee->haveaddr = 0;
+ /* fallthrough */
+ case I2C_START_RECV:
DPRINTK("clear\n");
if (ee->blk && ee->changed) {
int len = blk_pwrite(ee->blk, 0, ee->mem, ee->rsize, 0);
@@ -84,6 +85,10 @@ uint8_t at24c_eeprom_recv(I2CSlave *s)
EEPROMState *ee = AT24C_EE(s);
uint8_t ret;
+ if (ee->haveaddr == 1) {
+ return 0xff;
+ }
+
ret = ee->mem[ee->cur];
ee->cur = (ee->cur + 1u) % ee->rsize;