diff options
| author | Beniamino Galvani <b.galvani@gmail.com> | 2014-03-25 19:22:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:06 +0100 |
| commit | 6619bc5c55c1322a89009e2edd530113da95d551 (patch) | |
| tree | 305b213a8168d24c8df60a3a930b3a800086a827 /hw | |
| parent | 103db49a106d1f015a16432eb73cc4046792fbad (diff) | |
allwinner-emac: update irq status after writes to interrupt registers
The irq line status must be updated after writes to the INT_CTL and
INT_STA registers.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1395771730-16882-8-git-send-email-b.galvani@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/net/allwinner_emac.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c index 91931acad6..d780ba0fcb 100644 --- a/hw/net/allwinner_emac.c +++ b/hw/net/allwinner_emac.c @@ -391,9 +391,11 @@ static void aw_emac_write(void *opaque, hwaddr offset, uint64_t value, break; case EMAC_INT_CTL_REG: s->int_ctl = value; + aw_emac_update_irq(s); break; case EMAC_INT_STA_REG: s->int_sta &= ~value; + aw_emac_update_irq(s); break; case EMAC_MAC_MADR_REG: s->phy_target = value; |