Coding style fixes in PowerPC related code (no functional change):

- avoid useless blanks at EOL.
- avoid tabs.
- fix wrapping lines on 80 chars terminals.
- add missing ';' at macros EOL to avoid confusing auto-identers.
- fix identation.
- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3178 c046a42c-6fe2-441c-8c8c-71466251a162

3 files changed, 39 insertions, 25 deletions

diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index dd13508503..4c5a653033 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -924,7 +924,8 @@ enum {
     SDRAM0_CFGDATA = 0x011,
 };
 
-static uint32_t sdram_bcr (target_phys_addr_t ram_base, target_phys_addr_t ram_size)
+static uint32_t sdram_bcr (target_phys_addr_t ram_base,
+                           target_phys_addr_t ram_size)
 {
     uint32_t bcr;
 
@@ -1217,9 +1218,11 @@ void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
         sdram->irq = irq;
         sdram->nbanks = nbanks;
         memset(sdram->ram_bases, 0, 4 * sizeof(target_phys_addr_t));
-        memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(target_phys_addr_t));
+        memcpy(sdram->ram_bases, ram_bases,
+               nbanks * sizeof(target_phys_addr_t));
         memset(sdram->ram_sizes, 0, 4 * sizeof(target_phys_addr_t));
-        memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(target_phys_addr_t));
+        memcpy(sdram->ram_sizes, ram_sizes,
+               nbanks * sizeof(target_phys_addr_t));
         sdram_reset(sdram);
         qemu_register_reset(&sdram_reset, sdram);
         ppc_dcr_register(env, SDRAM0_CFGADDR,
@@ -2212,7 +2215,6 @@ static void ppc4xx_gpt_set_outputs (ppc4xx_gpt_t *gpt)
         }
         mask = mask >> 1;
     }
-
 }
 
 static void ppc4xx_gpt_set_irqs (ppc4xx_gpt_t *gpt)
@@ -2228,7 +2230,6 @@ static void ppc4xx_gpt_set_irqs (ppc4xx_gpt_t *gpt)
             qemu_irq_lower(gpt->irqs[i]);
         mask = mask >> 1;
     }
-
 }
 
 static void ppc4xx_gpt_compute_timer (ppc4xx_gpt_t *gpt)
diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c
index a5e67e024f..dc115949f5 100644
--- a/hw/ppc_chrp.c
+++ b/hw/ppc_chrp.c
@@ -46,22 +46,26 @@ static int macio_nvram_mem_index = -1;
 
 /* DBDMA: currently no op - should suffice right now */
 
-static void dbdma_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void dbdma_writeb (void *opaque,
+                          target_phys_addr_t addr, uint32_t value)
 {
     printf("%s: 0x" PADDRX " <= 0x%08x\n", __func__, addr, value);
 }
 
-static void dbdma_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void dbdma_writew (void *opaque,
+                          target_phys_addr_t addr, uint32_t value)
 {
 }
 
-static void dbdma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void dbdma_writel (void *opaque,
+                          target_phys_addr_t addr, uint32_t value)
 {
 }
 
 static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr)
 {
     printf("%s: 0x" PADDRX " => 0x00000000\n", __func__, addr);
+
     return 0;
 }
 
@@ -92,7 +96,8 @@ typedef struct MacIONVRAMState {
     uint8_t data[0x2000];
 } MacIONVRAMState;
 
-static void macio_nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void macio_nvram_writeb (void *opaque,
+                                target_phys_addr_t addr, uint32_t value)
 {
     MacIONVRAMState *s = opaque;
     addr = (addr >> 4) & 0x1fff;
@@ -108,6 +113,7 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
     addr = (addr >> 4) & 0x1fff;
     value = s->data[addr];
     //    printf("macio_nvram_readb %04x = %02x\n", addr, value);
+
     return value;
 }
 
@@ -123,7 +129,7 @@ static CPUReadMemoryFunc *macio_nvram_read[] = {
     &macio_nvram_readb,
 };
 
-static MacIONVRAMState *macio_nvram_init(void)
+static MacIONVRAMState *macio_nvram_init (void)
 {
     MacIONVRAMState *s;
     s = qemu_mallocz(sizeof(MacIONVRAMState));
@@ -131,11 +137,12 @@ static MacIONVRAMState *macio_nvram_init(void)
         return NULL;
     macio_nvram_mem_index = cpu_register_io_memory(0, macio_nvram_read,
                                                    macio_nvram_write, s);
+
     return s;
 }
 
-static void macio_map(PCIDevice *pci_dev, int region_num,
-                      uint32_t addr, uint32_t size, int type)
+static void macio_map (PCIDevice *pci_dev, int region_num,
+                       uint32_t addr, uint32_t size, int type)
 {
     if (heathrow_pic_mem_index >= 0) {
         cpu_register_physical_memory(addr + 0x00000, 0x1000,
@@ -152,10 +159,11 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
                                      openpic_mem_index);
     }
     if (macio_nvram_mem_index >= 0)
-        cpu_register_physical_memory(addr + 0x60000, 0x20000, macio_nvram_mem_index);
+        cpu_register_physical_memory(addr + 0x60000, 0x20000,
+                                     macio_nvram_mem_index);
 }
 
-static void macio_init(PCIBus *bus, int device_id)
+static void macio_init (PCIBus *bus, int device_id)
 {
     PCIDevice *d;
 
@@ -204,7 +212,8 @@ static CPUReadMemoryFunc *unin_read[] = {
 
 /* temporary frame buffer OSI calls for the video.x driver. The right
    solution is to modify the driver to use VGA PCI I/Os */
-static int vga_osi_call(CPUState *env)
+/* XXX: to be removed. This is no way related to emulation */
+static int vga_osi_call (CPUState *env)
 {
     static int vga_vbl_enabled;
     int linesize;
@@ -264,10 +273,11 @@ static int vga_osi_call(CPUState *env)
         fprintf(stderr, "unsupported OSI call R5=" REGX "\n", env->gpr[5]);
         break;
     }
+
     return 1; /* osi_call handled */
 }
 
-static uint8_t nvram_chksum(const uint8_t *buf, int n)
+static uint8_t nvram_chksum (const uint8_t *buf, int n)
 {
     int sum, i;
     sum = 0;
@@ -277,7 +287,7 @@ static uint8_t nvram_chksum(const uint8_t *buf, int n)
 }
 
 /* set a free Mac OS NVRAM partition */
-void pmac_format_nvram_partition(uint8_t *buf, int len)
+void pmac_format_nvram_partition (uint8_t *buf, int len)
 {
     char partition_name[12] = "wwwwwwwwwwww";
 
@@ -503,8 +513,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device,
                     ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
                 break;
             default:
-                cpu_abort(env,
-                          "Only bus model not supported on mac99 machine\n");
+                cpu_abort(env, "Bus model not supported on mac99 machine\n");
                 exit(1);
             }
         }
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index d1075d9b11..de0e9f098e 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -76,7 +76,7 @@ static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 int speaker_data_on;
 int dummy_refresh_clock;
 
-static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+static void speaker_ioport_write (void *opaque, uint32_t addr, uint32_t val)
 {
 #if 0
     speaker_data_on = (val >> 1) & 1;
@@ -110,7 +110,7 @@ static inline uint32_t _PPC_intack_read (target_phys_addr_t addr)
 
     if (addr == 0xBFFFFFF0)
         retval = pic_intack_read(isa_pic);
-       //   printf("%s: 0x%08x <= %d\n", __func__, addr, retval);
+    //   printf("%s: 0x%08x <= %d\n", __func__, addr, retval);
 
     return retval;
 }
@@ -177,12 +177,14 @@ static struct {
     /* Error diagnostic */
 } XCSR;
 
-static void PPC_XCSR_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void PPC_XCSR_writeb (void *opaque,
+                             target_phys_addr_t addr, uint32_t value)
 {
     printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value);
 }
 
-static void PPC_XCSR_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void PPC_XCSR_writew (void *opaque,
+                             target_phys_addr_t addr, uint32_t value)
 {
 #ifdef TARGET_WORDS_BIGENDIAN
     value = bswap16(value);
@@ -190,7 +192,8 @@ static void PPC_XCSR_writew (void *opaque, target_phys_addr_t addr, uint32_t val
     printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value);
 }
 
-static void PPC_XCSR_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void PPC_XCSR_writel (void *opaque,
+                             target_phys_addr_t addr, uint32_t value)
 {
 #ifdef TARGET_WORDS_BIGENDIAN
     value = bswap32(value);
@@ -664,7 +667,8 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
     cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
     /* PowerPC control and status register group */
 #if 0
-    PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write, NULL);
+    PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write,
+                                           NULL);
     cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
 #endif