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authorPeter Maydell <peter.maydell@linaro.org>2017-09-14 18:54:09 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-14 18:54:09 +0100
commitd28e29a92585e94264628b1b27262fe2d7573f51 (patch)
treee956f9c4bd71330f186a36847460999882a6c651 /hw
parent3dabde1128b671f36ac6cb36b97b273139964420 (diff)
parentce3bc112cdb1d462e2d52eaa17a7314e7f3af504 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170914' into staging
target-arm queue: * v7M: various code cleanups * v7M: set correct BFSR bits on bus fault * v7M: clear exclusive monitor on reset and exception entry/exit * v7M: don't apply priority mask to negative priorities * zcu102: support 'secure' and 'virtualization' machine properties * aarch64: fix ERET single stepping * gpex: implement PCI INTx routing * mps2-an511: fix UART overflow interrupt line wiring # gpg: Signature made Thu 14 Sep 2017 18:50:48 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20170914: mps2-an511: Fix wiring of UART overflow interrupt lines hw/pci-host/gpex: Implement PCI INTx routing hw/arm/virt: Set INTx/gsi mapping hw/pci-host/gpex: Set INTx index/gsi mapping target/arm: Avoid an extra temporary for store_exclusive AArch64: Fix single stepping of ERET instruction xlnx-zcu102: Mark the EP108 machine as deprecated xlnx-zcu102: Add a machine level virtualization property xlnx-zcu102: Add a machine level secure property xlnx-zcu102: Manually create the machines xlnx-ep108: Rename to ZCU102 target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit() target/arm: Add and use defines for EXCRET constants target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit() nvic: Don't apply group priority mask to negative priorities target/arm: Get PRECISERR and IBUSERR the right way round target/arm: Clear exclusive monitor on v7M reset, exception entry/exit target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/Makefile.objs2
-rw-r--r--hw/arm/mps2.c4
-rw-r--r--hw/arm/virt.c1
-rw-r--r--hw/arm/xlnx-ep108.c139
-rw-r--r--hw/arm/xlnx-zcu102.c259
-rw-r--r--hw/arm/xlnx-zynqmp.c3
-rw-r--r--hw/intc/armv7m_nvic.c11
-rw-r--r--hw/pci-host/gpex.c22
8 files changed, 296 insertions, 145 deletions
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index a2e56ecaae..5ee6f7da5b 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -13,7 +13,7 @@ obj-y += omap1.o omap2.o strongarm.o
obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
obj-$(CONFIG_RASPI) += bcm2835_peripherals.o bcm2836.o raspi.o
obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-ep108.o
+obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-zcu102.o
obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index abb0ab6d71..769cff872c 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -287,8 +287,8 @@ static void mps2_common_init(MachineState *machine)
cmsdk_apb_uart_create(uartbase[i],
qdev_get_gpio_in(txrx_orgate_dev, 0),
qdev_get_gpio_in(txrx_orgate_dev, 1),
- qdev_get_gpio_in(orgate_dev, 0),
- qdev_get_gpio_in(orgate_dev, 1),
+ qdev_get_gpio_in(orgate_dev, i * 2),
+ qdev_get_gpio_in(orgate_dev, i * 2 + 1),
NULL,
uartchr, SYSCLK_FRQ);
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index fe96557997..cfd834d0cc 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1057,6 +1057,7 @@ static void create_pcie(const VirtMachineState *vms, qemu_irq *pic)
for (i = 0; i < GPEX_NUM_IRQS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]);
+ gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
}
pci = PCI_HOST_BRIDGE(dev);
diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
deleted file mode 100644
index c339cd495c..0000000000
--- a/hw/arm/xlnx-ep108.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Xilinx ZynqMP EP108 board
- *
- * Copyright (C) 2015 Xilinx Inc
- * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- */
-
-#include "qemu/osdep.h"
-#include "qapi/error.h"
-#include "qemu-common.h"
-#include "cpu.h"
-#include "hw/arm/xlnx-zynqmp.h"
-#include "hw/boards.h"
-#include "qemu/error-report.h"
-#include "exec/address-spaces.h"
-#include "qemu/log.h"
-
-typedef struct XlnxEP108 {
- XlnxZynqMPState soc;
- MemoryRegion ddr_ram;
-} XlnxEP108;
-
-static struct arm_boot_info xlnx_ep108_binfo;
-
-static void xlnx_ep108_init(MachineState *machine)
-{
- XlnxEP108 *s = g_new0(XlnxEP108, 1);
- int i;
- uint64_t ram_size = machine->ram_size;
-
- /* Create the memory region to pass to the SoC */
- if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
- error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
- "0x%llx", ram_size,
- XLNX_ZYNQMP_MAX_RAM_SIZE);
- exit(1);
- }
-
- if (ram_size < 0x08000000) {
- qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for EP108",
- ram_size);
- }
-
- memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
- ram_size);
-
- object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
- object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
- &error_abort);
-
- object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
- "ddr-ram", &error_abort);
-
- object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
-
- /* Create and plug in the SD cards */
- for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
- BusState *bus;
- DriveInfo *di = drive_get_next(IF_SD);
- BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
- DeviceState *carddev;
- char *bus_name;
-
- bus_name = g_strdup_printf("sd-bus%d", i);
- bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
- g_free(bus_name);
- if (!bus) {
- error_report("No SD bus found for SD card %d", i);
- exit(1);
- }
- carddev = qdev_create(bus, TYPE_SD_CARD);
- qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
- object_property_set_bool(OBJECT(carddev), true, "realized",
- &error_fatal);
- }
-
- for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
- SSIBus *spi_bus;
- DeviceState *flash_dev;
- qemu_irq cs_line;
- DriveInfo *dinfo = drive_get_next(IF_MTD);
- gchar *bus_name = g_strdup_printf("spi%d", i);
-
- spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
- g_free(bus_name);
-
- flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
- if (dinfo) {
- qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
- &error_fatal);
- }
- qdev_init_nofail(flash_dev);
-
- cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
-
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
- }
-
- /* TODO create and connect IDE devices for ide_drive_get() */
-
- xlnx_ep108_binfo.ram_size = ram_size;
- xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
- xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
- xlnx_ep108_binfo.initrd_filename = machine->initrd_filename;
- xlnx_ep108_binfo.loader_start = 0;
- arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_ep108_binfo);
-}
-
-static void xlnx_ep108_machine_init(MachineClass *mc)
-{
- mc->desc = "Xilinx ZynqMP EP108 board";
- mc->init = xlnx_ep108_init;
- mc->block_default_type = IF_IDE;
- mc->units_per_default_bus = 1;
- mc->ignore_memory_transaction_failures = true;
-}
-
-DEFINE_MACHINE("xlnx-ep108", xlnx_ep108_machine_init)
-
-static void xlnx_zcu102_machine_init(MachineClass *mc)
-{
- mc->desc = "Xilinx ZynqMP ZCU102 board";
- mc->init = xlnx_ep108_init;
- mc->block_default_type = IF_IDE;
- mc->units_per_default_bus = 1;
- mc->ignore_memory_transaction_failures = true;
-}
-
-DEFINE_MACHINE("xlnx-zcu102", xlnx_zcu102_machine_init)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
new file mode 100644
index 0000000000..519a16ed98
--- /dev/null
+++ b/hw/arm/xlnx-zcu102.c
@@ -0,0 +1,259 @@
+/*
+ * Xilinx ZynqMP ZCU102 board
+ *
+ * Copyright (C) 2015 Xilinx Inc
+ * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "hw/arm/xlnx-zynqmp.h"
+#include "hw/boards.h"
+#include "qemu/error-report.h"
+#include "exec/address-spaces.h"
+#include "qemu/log.h"
+
+typedef struct XlnxZCU102 {
+ MachineState parent_obj;
+
+ XlnxZynqMPState soc;
+ MemoryRegion ddr_ram;
+
+ bool secure;
+ bool virt;
+} XlnxZCU102;
+
+#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
+#define ZCU102_MACHINE(obj) \
+ OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
+
+#define TYPE_EP108_MACHINE MACHINE_TYPE_NAME("xlnx-ep108")
+#define EP108_MACHINE(obj) \
+ OBJECT_CHECK(XlnxZCU102, (obj), TYPE_EP108_MACHINE)
+
+static struct arm_boot_info xlnx_zcu102_binfo;
+
+static bool zcu102_get_secure(Object *obj, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ return s->secure;
+}
+
+static void zcu102_set_secure(Object *obj, bool value, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ s->secure = value;
+}
+
+static bool zcu102_get_virt(Object *obj, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ return s->virt;
+}
+
+static void zcu102_set_virt(Object *obj, bool value, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ s->virt = value;
+}
+
+static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
+{
+ int i;
+ uint64_t ram_size = machine->ram_size;
+
+ /* Create the memory region to pass to the SoC */
+ if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
+ error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
+ "0x%llx", ram_size,
+ XLNX_ZYNQMP_MAX_RAM_SIZE);
+ exit(1);
+ }
+
+ if (ram_size < 0x08000000) {
+ qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
+ ram_size);
+ }
+
+ memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
+ ram_size);
+
+ object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
+ &error_abort);
+
+ object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
+ "ddr-ram", &error_abort);
+ object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
+ &error_fatal);
+ object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
+ &error_fatal);
+
+ object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
+
+ /* Create and plug in the SD cards */
+ for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
+ BusState *bus;
+ DriveInfo *di = drive_get_next(IF_SD);
+ BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
+ DeviceState *carddev;
+ char *bus_name;
+
+ bus_name = g_strdup_printf("sd-bus%d", i);
+ bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
+ g_free(bus_name);
+ if (!bus) {
+ error_report("No SD bus found for SD card %d", i);
+ exit(1);
+ }
+ carddev = qdev_create(bus, TYPE_SD_CARD);
+ qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
+ object_property_set_bool(OBJECT(carddev), true, "realized",
+ &error_fatal);
+ }
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+ SSIBus *spi_bus;
+ DeviceState *flash_dev;
+ qemu_irq cs_line;
+ DriveInfo *dinfo = drive_get_next(IF_MTD);
+ gchar *bus_name = g_strdup_printf("spi%d", i);
+
+ spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
+ g_free(bus_name);
+
+ flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
+ if (dinfo) {
+ qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
+ &error_fatal);
+ }
+ qdev_init_nofail(flash_dev);
+
+ cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
+ }
+
+ /* TODO create and connect IDE devices for ide_drive_get() */
+
+ xlnx_zcu102_binfo.ram_size = ram_size;
+ xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
+ xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
+ xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
+ xlnx_zcu102_binfo.loader_start = 0;
+ arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
+}
+
+static void xlnx_ep108_init(MachineState *machine)
+{
+ XlnxZCU102 *s = EP108_MACHINE(machine);
+
+ xlnx_zynqmp_init(s, machine);
+}
+
+static void xlnx_ep108_machine_instance_init(Object *obj)
+{
+ XlnxZCU102 *s = EP108_MACHINE(obj);
+
+ /* EP108, we don't support setting secure or virt */
+ s->secure = false;
+ s->virt = false;
+}
+
+static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ mc->desc = "Xilinx ZynqMP EP108 board (Deprecated, please use xlnx-zcu102)";
+ mc->init = xlnx_ep108_init;
+ mc->block_default_type = IF_IDE;
+ mc->units_per_default_bus = 1;
+ mc->ignore_memory_transaction_failures = true;
+}
+
+static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
+ .name = MACHINE_TYPE_NAME("xlnx-ep108"),
+ .parent = TYPE_MACHINE,
+ .class_init = xlnx_ep108_machine_class_init,
+ .instance_init = xlnx_ep108_machine_instance_init,
+ .instance_size = sizeof(XlnxZCU102),
+};
+
+static void xlnx_ep108_machine_init_register_types(void)
+{
+ type_register_static(&xlnx_ep108_machine_init_typeinfo);
+}
+
+static void xlnx_zcu102_init(MachineState *machine)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(machine);
+
+ xlnx_zynqmp_init(s, machine);
+}
+
+static void xlnx_zcu102_machine_instance_init(Object *obj)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ /* Default to secure mode being disabled */
+ s->secure = false;
+ object_property_add_bool(obj, "secure", zcu102_get_secure,
+ zcu102_set_secure, NULL);
+ object_property_set_description(obj, "secure",
+ "Set on/off to enable/disable the ARM "
+ "Security Extensions (TrustZone)",
+ NULL);
+
+ /* Default to virt (EL2) being disabled */
+ s->virt = false;
+ object_property_add_bool(obj, "virtualization", zcu102_get_virt,
+ zcu102_set_virt, NULL);
+ object_property_set_description(obj, "virtualization",
+ "Set on/off to enable/disable emulating a "
+ "guest CPU which implements the ARM "
+ "Virtualization Extensions",
+ NULL);
+}
+
+static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ mc->desc = "Xilinx ZynqMP ZCU102 board";
+ mc->init = xlnx_zcu102_init;
+ mc->block_default_type = IF_IDE;
+ mc->units_per_default_bus = 1;
+ mc->ignore_memory_transaction_failures = true;
+}
+
+static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
+ .name = MACHINE_TYPE_NAME("xlnx-zcu102"),
+ .parent = TYPE_MACHINE,
+ .class_init = xlnx_zcu102_machine_class_init,
+ .instance_init = xlnx_zcu102_machine_instance_init,
+ .instance_size = sizeof(XlnxZCU102),
+};
+
+static void xlnx_zcu102_machine_init_register_types(void)
+{
+ type_register_static(&xlnx_zcu102_machine_init_typeinfo);
+}
+
+type_init(xlnx_zcu102_machine_init_register_types)
+type_init(xlnx_ep108_machine_init_register_types)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 22c2a33719..2b27daf51d 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -255,7 +255,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->apu_cpu[i]),
s->secure, "has_el3", NULL);
object_property_set_bool(OBJECT(&s->apu_cpu[i]),
- false, "has_el2", NULL);
+ s->virt, "has_el2", NULL);
object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
"reset-cbar", &error_abort);
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
@@ -427,6 +427,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
static Property xlnx_zynqmp_props[] = {
DEFINE_PROP_STRING("boot-cpu", XlnxZynqMPState, boot_cpu),
DEFINE_PROP_BOOL("secure", XlnxZynqMPState, secure, false),
+ DEFINE_PROP_BOOL("virtualization", XlnxZynqMPState, virt, false),
DEFINE_PROP_BOOL("has_rpu", XlnxZynqMPState, has_rpu, false),
DEFINE_PROP_LINK("ddr-ram", XlnxZynqMPState, ddr_ram, TYPE_MEMORY_REGION,
MemoryRegion *),
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 1fecfd6377..d3e20561c7 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -152,8 +152,12 @@ static void nvic_recompute_state(NVICState *s)
}
}
+ if (active_prio > 0) {
+ active_prio &= nvic_gprio_mask(s);
+ }
+
s->vectpending = pend_irq;
- s->exception_prio = active_prio & nvic_gprio_mask(s);
+ s->exception_prio = active_prio;
trace_nvic_recompute_state(s->vectpending, s->exception_prio);
}
@@ -329,7 +333,10 @@ void armv7m_nvic_acknowledge_irq(void *opaque)
assert(vec->enabled);
assert(vec->pending);
- pendgroupprio = vec->prio & nvic_gprio_mask(s);
+ pendgroupprio = vec->prio;
+ if (pendgroupprio > 0) {
+ pendgroupprio &= nvic_gprio_mask(s);
+ }
assert(pendgroupprio < running);
trace_nvic_acknowledge_irq(pending, vec->prio);
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 83084b9aab..be25245219 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -43,6 +43,27 @@ static void gpex_set_irq(void *opaque, int irq_num, int level)
qemu_set_irq(s->irq[irq_num], level);
}
+int gpex_set_irq_num(GPEXHost *s, int index, int gsi)
+{
+ if (index >= GPEX_NUM_IRQS) {
+ return -EINVAL;
+ }
+
+ s->irq_num[index] = gsi;
+ return 0;
+}
+
+static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
+{
+ PCIINTxRoute route;
+ GPEXHost *s = opaque;
+
+ route.mode = PCI_INTX_ENABLED;
+ route.irq = s->irq_num[pin];
+
+ return route;
+}
+
static void gpex_host_realize(DeviceState *dev, Error **errp)
{
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
@@ -67,6 +88,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
&s->io_ioport, 0, 4, TYPE_PCIE_BUS);
qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
+ pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
qdev_init_nofail(DEVICE(&s->gpex_root));
}