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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2012-12-05 16:53:44 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-12-05 09:20:36 +0100
commit80625b97b52836b944a6438e8e3e9d992e6a00b6 (patch)
tree8177d9e996619406999d812002c6d9bd287baeaf /hw
parent859cc10d23e619153670fc58683373fa24d25b68 (diff)
xilinx_uartlite: Accept input after rx FIFO pop
The device return false from the can receive function when the FIFO is full. This mean the device should check for buffered input whenever a byte is popped from the FIFO. Reported-by: Jason Wu <huanyu@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/xilinx_uartlite.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/xilinx_uartlite.c b/hw/xilinx_uartlite.c
index f890f2363d..02c5850331 100644
--- a/hw/xilinx_uartlite.c
+++ b/hw/xilinx_uartlite.c
@@ -97,6 +97,7 @@ uart_read(void *opaque, hwaddr addr, unsigned int size)
s->rx_fifo_len--;
uart_update_status(s);
uart_update_irq(s);
+ qemu_chr_accept_input(s->chr);
break;
default: