diff options
| author | Stefan Weil <sw@weilnetz.de> | 2012-01-28 05:18:18 +0000 |
|---|---|---|
| committer | Stefan Weil <sw@weilnetz.de> | 2012-03-15 20:55:45 +0100 |
| commit | 03a1a8e1b13bb447c898eb282ee8c3fc41c866b4 (patch) | |
| tree | fde5c6fdc0c504e09c34b19c447e8b6e5f417d63 /hw | |
| parent | bb4b335871677e0aa447484332e975d6c2ab0ba4 (diff) | |
malta: Use symbolic hardware addresses
The patch adds definitions of some hardware addresses and uses these
definitions.
It also replaces the type of all addresses from signed to unsigned values.
This is only a cosmetic change because addresses are unsigned values,
the functions called also expect unsigned values,
and we need no sign extension here.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/mips_malta.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 734e70011c..d8c8c35bd9 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -55,6 +55,13 @@ #define ENVP_NB_ENTRIES 16 #define ENVP_ENTRY_SIZE 256 +/* Hardware addresses */ +#define FLASH_ADDRESS 0x1e000000ULL +#define FPGA_ADDRESS 0x1f000000ULL +#define RESET_ADDRESS 0x1fc00000ULL + +#define FLASH_SIZE 0x400000 + #define MAX_IDE_BUS 2 typedef struct { @@ -777,7 +784,7 @@ void mips_malta_init (ram_addr_t ram_size, MemoryRegion *system_memory = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1); - target_long bios_size = 0x400000; + target_long bios_size = FLASH_SIZE; int64_t kernel_entry; PCIBus *pci_bus; ISABus *isa_bus; @@ -847,7 +854,7 @@ void mips_malta_init (ram_addr_t ram_size, be = 0; #endif /* FPGA */ - malta_fpga_init(system_memory, 0x1f000000LL, env->irq[2], serial_hds[2]); + malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[2], serial_hds[2]); /* Load firmware in flash / BIOS. */ dinfo = drive_get(IF_PFLASH, 0, fl_idx); @@ -855,11 +862,11 @@ void mips_malta_init (ram_addr_t ram_size, if (dinfo) { printf("Register parallel flash %d size " TARGET_FMT_lx " at " "addr %08llx '%s' %x\n", - fl_idx, bios_size, 0x1e000000LL, + fl_idx, bios_size, FLASH_ADDRESS, bdrv_get_device_name(dinfo->bdrv), fl_sectors); } #endif - fl = pflash_cfi01_register(0x1e000000LL, NULL, "mips_malta.bios", + fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", BIOS_SIZE, dinfo ? dinfo->bdrv : NULL, 65536, fl_sectors, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); @@ -882,7 +889,7 @@ void mips_malta_init (ram_addr_t ram_size, } filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { - bios_size = load_image_targphys(filename, 0x1e000000LL, + bios_size = load_image_targphys(filename, FLASH_ADDRESS, BIOS_SIZE); g_free(filename); } else { @@ -911,7 +918,7 @@ void mips_malta_init (ram_addr_t ram_size, /* Map the BIOS at a 2nd physical location, as on the real board. */ memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE); - memory_region_add_subregion(system_memory, 0x1fc00000LL, bios_alias); + memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias); /* Board ID = 0x420 (Malta Board with CoreLV) XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should |