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authorMarc-André Lureau <marcandre.lureau@redhat.com>2017-10-10 00:55:42 +0200
committerStefan Berger <stefanb@linux.vnet.ibm.com>2017-10-19 11:42:19 -0400
commitff2bc0c1159d7c1a32495cb0dbad83720554fb3d (patch)
treec1dd0e9de4ec49d68716bc7924f9a4fadcfdf8c1 /hw
parentf2a48d696c12aaac12993364371daae9f6233c37 (diff)
tpm-tis: remove unused hw_access argument
This argument is always false, simplify the code. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/tpm/tpm_tis.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c
index d5118e7f60..a9e9cbdeb2 100644
--- a/hw/tpm/tpm_tis.c
+++ b/hw/tpm/tpm_tis.c
@@ -615,9 +615,8 @@ static uint64_t tpm_tis_mmio_read(void *opaque, hwaddr addr,
* Write a value to a register of the TIS interface
* See specs pages 33-63 for description of the registers
*/
-static void tpm_tis_mmio_write_intern(void *opaque, hwaddr addr,
- uint64_t val, unsigned size,
- bool hw_access)
+static void tpm_tis_mmio_write(void *opaque, hwaddr addr,
+ uint64_t val, unsigned size)
{
TPMState *s = opaque;
TPMTISEmuState *tis = &s->s.tis;
@@ -631,7 +630,7 @@ static void tpm_tis_mmio_write_intern(void *opaque, hwaddr addr,
DPRINTF("tpm_tis: write.%u(%08x) = %08x\n", size, (int)addr, (int)val);
- if (locty == 4 && !hw_access) {
+ if (locty == 4) {
DPRINTF("tpm_tis: Access to locality 4 only allowed from hardware\n");
return;
}
@@ -942,12 +941,6 @@ static void tpm_tis_mmio_write_intern(void *opaque, hwaddr addr,
}
}
-static void tpm_tis_mmio_write(void *opaque, hwaddr addr,
- uint64_t val, unsigned size)
-{
- tpm_tis_mmio_write_intern(opaque, addr, val, size, false);
-}
-
static const MemoryRegionOps tpm_tis_memory_ops = {
.read = tpm_tis_mmio_read,
.write = tpm_tis_mmio_write,