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authorPeter Maydell <peter.maydell@linaro.org>2012-03-02 11:56:39 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-03-02 11:56:39 +0000
commit0f58a1882bae42d7c76bdb66792c204a810ec01f (patch)
treeb8c6156e921eb00a00f74b80233936db55e1ca7c /hw
parent412beee6a0349ce430920e2b2faa8009ced4a672 (diff)
hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties
Fix confusion in the Property arrays for the "arm11mpcore_priv" (per-CPU devices for the ARM11MPcore CPU) and "realview_mpcore" (realview-eb board specific device encapsulating CPU and some extra interrupt controllers) -- the num-irq property was defined on the wrong device and the mpcore_rirq_properties were defined as offsets in the wrong structure. The effect was that the realview-eb-mpcore machine would abort on startup trying to allocate an insane amount of memory. (This bug was introduced in the QOM conversion in commit 999e12bb.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm11mpcore.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/hw/arm11mpcore.c b/hw/arm11mpcore.c
index 102348bb70..c67b70f3b9 100644
--- a/hw/arm11mpcore.c
+++ b/hw/arm11mpcore.c
@@ -202,16 +202,7 @@ static int realview_mpcore_init(SysBusDevice *dev)
}
static Property mpcore_rirq_properties[] = {
- DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1),
- /* The ARM11 MPCORE TRM says the on-chip controller may have
- * anything from 0 to 224 external interrupt IRQ lines (with another
- * 32 internal). We default to 32+32, which is the number provided by
- * the ARM11 MPCore test chip in the Realview Versatile Express
- * coretile. Other boards may differ and should set this property
- * appropriately. Some Linux kernels may not boot if the hardware
- * has more IRQ lines than the kernel expects.
- */
- DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64),
+ DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -233,6 +224,15 @@ static TypeInfo mpcore_rirq_info = {
static Property mpcore_priv_properties[] = {
DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1),
+ /* The ARM11 MPCORE TRM says the on-chip controller may have
+ * anything from 0 to 224 external interrupt IRQ lines (with another
+ * 32 internal). We default to 32+32, which is the number provided by
+ * the ARM11 MPCore test chip in the Realview Versatile Express
+ * coretile. Other boards may differ and should set this property
+ * appropriately. Some Linux kernels may not boot if the hardware
+ * has more IRQ lines than the kernel expects.
+ */
+ DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64),
DEFINE_PROP_END_OF_LIST(),
};