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authorEric Benard <eric@eukrea.com>2012-04-16 05:02:47 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-04-20 15:39:05 +0000
commit964c695a54ceda3ac8c965542829d4e482e28de7 (patch)
tree36f28fdf9986f63ef6bd35a5184c0e1887ed5443 /hw
parentbdac1c1e958c3b0bb1d02e8fb8cc141306eea103 (diff)
versatiblepb: add NOR flash support
- add support for the 64MB NOR CFI01 flash available at 0x34000000 on the versatilepb board http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0225d/BBAJIHEC.html - tested with barebox bootloader Signed-off-by: Eric BĂ©nard <eric@eukrea.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/versatilepb.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index d011554063..7c79c54d08 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -17,6 +17,11 @@
#include "boards.h"
#include "blockdev.h"
#include "exec-memory.h"
+#include "flash.h"
+
+#define VERSATILE_FLASH_ADDR 0x34000000
+#define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
+#define VERSATILE_FLASH_SECT_SIZE (256 * 1024)
/* Primary interrupt controller. */
@@ -182,6 +187,7 @@ static void versatile_init(ram_addr_t ram_size,
i2c_bus *i2c;
int n;
int done_smc = 0;
+ DriveInfo *dinfo;
if (!cpu_model)
cpu_model = "arm926";
@@ -316,6 +322,16 @@ static void versatile_init(ram_addr_t ram_size,
/* 0x101f2000 UART1. */
/* 0x101f3000 UART2. */
/* 0x101f4000 SSPI. */
+ /* 0x34000000 NOR Flash */
+
+ dinfo = drive_get(IF_PFLASH, 0, 0);
+ if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flash",
+ VERSATILE_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL,
+ VERSATILE_FLASH_SECT_SIZE,
+ VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
+ 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
+ fprintf(stderr, "qemu: Error registering flash memory.\n");
+ }
versatile_binfo.ram_size = ram_size;
versatile_binfo.kernel_filename = kernel_filename;