aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2021-02-11 19:57:50 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-02-11 19:57:50 +0000
commiteac92d316351b855ba79eb374dd21cc367f1f9c1 (patch)
tree3dd45330cd46e965e5ac5dfff8379a55df7d497f /hw
parentc973f06521b07af0f82893b75a1d55562fffb4b5 (diff)
parentd3c1183ffeb71ca3a783eae3d7e1c51e71e8a621 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210211-1' into staging
target-arm queue: * Correctly initialize MDCR_EL2.HPMN * versal: Use nr_apu_cpus in favor of hard coding 2 * accel/tcg: Add URL of clang bug to comment about our workaround * Add support for FEAT_DIT, Data Independent Timing * Remove GPIO from unimplemented NPCM7XX * Fix SCR RES1 handling * Don't migrate CPUARMState.features # gpg: Signature made Thu 11 Feb 2021 19:56:40 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210211-1: target/arm: Correctly initialize MDCR_EL2.HPMN hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 accel/tcg: Add URL of clang bug to comment about our workaround arm: Update infocenter.arm.com URLs target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate target/arm: Add support for FEAT_DIT, Data Independent Timing hw/arm: Remove GPIO from unimplemented NPCM7XX target/arm: Fix SCR RES1 handling target/arm: Don't migrate CPUARMState.features Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/aspeed_ast2600.c2
-rw-r--r--hw/arm/musca.c4
-rw-r--r--hw/arm/npcm7xx.c8
-rw-r--r--hw/arm/xlnx-versal.c4
-rw-r--r--hw/misc/arm_integrator_debug.c2
-rw-r--r--hw/timer/arm_timer.c7
6 files changed, 10 insertions, 17 deletions
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 12e4a16d37..bf31ca351f 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -216,7 +216,7 @@ static void aspeed_soc_ast2600_init(Object *obj)
/*
* ASPEED ast2600 has 0xf as cluster ID
*
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
+ * https://developer.arm.com/documentation/ddi0388/e/the-system-control-coprocessors/summary-of-system-control-coprocessor-registers/multiprocessor-affinity-register
*/
static uint64_t aspeed_calc_affinity(int cpu)
{
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 945643c3cd..7a83f7dda7 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -15,8 +15,8 @@
* https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-a-test-chip-board
* https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-b-test-chip-board
* We model the A and B1 variants of this board, as described in the TRMs:
- * http://infocenter.arm.com/help/topic/com.arm.doc.101107_0000_00_en/index.html
- * http://infocenter.arm.com/help/topic/com.arm.doc.101312_0000_00_en/index.html
+ * https://developer.arm.com/documentation/101107/latest/
+ * https://developer.arm.com/documentation/101312/latest/
*/
#include "qemu/osdep.h"
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 72040d4079..d1fe9bd1df 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -576,14 +576,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * KiB);
create_unimplemented_device("npcm7xx.kcs", 0xf0007000, 4 * KiB);
create_unimplemented_device("npcm7xx.gfxi", 0xf000e000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[0]", 0xf0010000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[1]", 0xf0011000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[2]", 0xf0012000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[3]", 0xf0013000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[4]", 0xf0014000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[5]", 0xf0015000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[6]", 0xf0016000, 4 * KiB);
- create_unimplemented_device("npcm7xx.gpio[7]", 0xf0017000, 4 * KiB);
create_unimplemented_device("npcm7xx.smbus[0]", 0xf0080000, 4 * KiB);
create_unimplemented_device("npcm7xx.smbus[1]", 0xf0081000, 4 * KiB);
create_unimplemented_device("npcm7xx.smbus[2]", 0xf0082000, 4 * KiB);
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index b0777166e8..628e77ef66 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -67,10 +67,10 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pic)
gicbusdev = SYS_BUS_DEVICE(&s->fpd.apu.gic);
gicdev = DEVICE(&s->fpd.apu.gic);
qdev_prop_set_uint32(gicdev, "revision", 3);
- qdev_prop_set_uint32(gicdev, "num-cpu", 2);
+ qdev_prop_set_uint32(gicdev, "num-cpu", nr_apu_cpus);
qdev_prop_set_uint32(gicdev, "num-irq", XLNX_VERSAL_NR_IRQS + 32);
qdev_prop_set_uint32(gicdev, "len-redist-region-count", 1);
- qdev_prop_set_uint32(gicdev, "redist-region-count[0]", 2);
+ qdev_prop_set_uint32(gicdev, "redist-region-count[0]", nr_apu_cpus);
qdev_prop_set_bit(gicdev, "has-security-extensions", true);
sysbus_realize(SYS_BUS_DEVICE(&s->fpd.apu.gic), &error_fatal);
diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c
index ec0d4b90d3..9a19727829 100644
--- a/hw/misc/arm_integrator_debug.c
+++ b/hw/misc/arm_integrator_debug.c
@@ -6,7 +6,7 @@
* to this area.
*
* The real h/w is described at:
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
+ * https://developer.arm.com/documentation/dui0159/b/peripherals-and-interfaces/debug-leds-and-dip-switch-interface
*
* Copyright (c) 2013 Alex Bennée <alex@bennee.com>
*
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index 98e70b2d26..15caff0e41 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -185,10 +185,11 @@ static arm_timer_state *arm_timer_init(uint32_t freq)
return s;
}
-/* ARM PrimeCell SP804 dual timer module.
+/*
+ * ARM PrimeCell SP804 dual timer module.
* Docs at
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/index.html
-*/
+ * https://developer.arm.com/documentation/ddi0271/latest/
+ */
#define TYPE_SP804 "sp804"
OBJECT_DECLARE_SIMPLE_TYPE(SP804State, SP804)