diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-06-03 14:01:43 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-06-03 14:01:43 +0000 |
commit | a4193c8a4bb36f64311d7d706e343ffabd9eb076 (patch) | |
tree | 929a609b14cd00b8701f5ace3e2ffb1b205f7ec3 /hw | |
parent | 170c6f8705710229af47f0cc9640a6cc4a1a0a3a (diff) |
support for opaque data on memory I/Os
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@874 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/ppc.c | 12 | ||||
-rw-r--r-- | hw/ppc_chrp.c | 2 | ||||
-rw-r--r-- | hw/ppc_prep.c | 26 | ||||
-rw-r--r-- | hw/vga.c | 66 |
4 files changed, 53 insertions, 53 deletions
@@ -197,18 +197,18 @@ void cpu_ppc_reset (CPUState *env) } #endif -static void PPC_io_writeb (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) { cpu_outb(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readb (target_phys_addr_t addr) +static uint32_t PPC_io_readb (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inb(NULL, addr & 0xffff); return ret; } -static void PPC_io_writew (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writew (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap16(value); @@ -216,7 +216,7 @@ static void PPC_io_writew (target_phys_addr_t addr, uint32_t value) cpu_outw(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readw (target_phys_addr_t addr) +static uint32_t PPC_io_readw (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inw(NULL, addr & 0xffff); #ifdef TARGET_WORDS_BIGENDIAN @@ -225,7 +225,7 @@ static uint32_t PPC_io_readw (target_phys_addr_t addr) return ret; } -static void PPC_io_writel (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap32(value); @@ -233,7 +233,7 @@ static void PPC_io_writel (target_phys_addr_t addr, uint32_t value) cpu_outl(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readl (target_phys_addr_t addr) +static uint32_t PPC_io_readl (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inl(NULL, addr & 0xffff); diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 380fb6e530..d2ab1709c6 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -64,7 +64,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, pci_pmac_init(); /* Register 64 KB of ISA IO space */ - PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write); + PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL); cpu_register_physical_memory(0x80000000, 0x10000, PPC_io_memory); // cpu_register_physical_memory(0xfe000000, 0xfe010000, PPC_io_memory); diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 4a866ef5fa..45b5853a6d 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -98,7 +98,7 @@ static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) /* PCI intack register */ /* Read-only register (?) */ -static void _PPC_intack_write (target_phys_addr_t addr, uint32_t value) +static void _PPC_intack_write (void *opaque, target_phys_addr_t addr, uint32_t value) { // printf("%s: 0x%08x => 0x%08x\n", __func__, addr, value); } @@ -114,12 +114,12 @@ static inline uint32_t _PPC_intack_read (target_phys_addr_t addr) return retval; } -static uint32_t PPC_intack_readb (target_phys_addr_t addr) +static uint32_t PPC_intack_readb (void *opaque, target_phys_addr_t addr) { return _PPC_intack_read(addr); } -static uint32_t PPC_intack_readw (target_phys_addr_t addr) +static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr) { #ifdef TARGET_WORDS_BIGENDIAN return bswap16(_PPC_intack_read(addr)); @@ -128,7 +128,7 @@ static uint32_t PPC_intack_readw (target_phys_addr_t addr) #endif } -static uint32_t PPC_intack_readl (target_phys_addr_t addr) +static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr) { #ifdef TARGET_WORDS_BIGENDIAN return bswap32(_PPC_intack_read(addr)); @@ -177,12 +177,12 @@ static struct { } XCSR; #endif -static void PPC_XCSR_writeb (target_phys_addr_t addr, uint32_t value) +static void PPC_XCSR_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) { printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value); } -static void PPC_XCSR_writew (target_phys_addr_t addr, uint32_t value) +static void PPC_XCSR_writew (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap16(value); @@ -190,7 +190,7 @@ static void PPC_XCSR_writew (target_phys_addr_t addr, uint32_t value) printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value); } -static void PPC_XCSR_writel (target_phys_addr_t addr, uint32_t value) +static void PPC_XCSR_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap32(value); @@ -198,7 +198,7 @@ static void PPC_XCSR_writel (target_phys_addr_t addr, uint32_t value) printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value); } -static uint32_t PPC_XCSR_readb (target_phys_addr_t addr) +static uint32_t PPC_XCSR_readb (void *opaque, target_phys_addr_t addr) { uint32_t retval = 0; @@ -207,7 +207,7 @@ static uint32_t PPC_XCSR_readb (target_phys_addr_t addr) return retval; } -static uint32_t PPC_XCSR_readw (target_phys_addr_t addr) +static uint32_t PPC_XCSR_readw (void *opaque, target_phys_addr_t addr) { uint32_t retval = 0; @@ -219,7 +219,7 @@ static uint32_t PPC_XCSR_readw (target_phys_addr_t addr) return retval; } -static uint32_t PPC_XCSR_readl (target_phys_addr_t addr) +static uint32_t PPC_XCSR_readl (void *opaque, target_phys_addr_t addr) { uint32_t retval = 0; @@ -480,7 +480,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, isa_mem_base = 0xc0000000; pci_prep_init(); /* Register 64 KB of ISA IO space */ - PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write); + PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL); cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory); /* init basic PC hardware */ @@ -525,10 +525,10 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl); /* PCI intack location */ PPC_io_memory = cpu_register_io_memory(0, PPC_intack_read, - PPC_intack_write); + PPC_intack_write, NULL); cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory); /* PowerPC control and status register group */ - PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write); + PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write, NULL); cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory); nvram = m48t59_init(8, 0x0074, NVRAM_SIZE); @@ -656,9 +656,9 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) #endif /* called for accesses between 0xa0000 and 0xc0000 */ -static uint32_t vga_mem_readb(target_phys_addr_t addr) +static uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr) { - VGAState *s = &vga_state; + VGAState *s = opaque; int memory_map_mode, plane; uint32_t ret; @@ -712,40 +712,40 @@ static uint32_t vga_mem_readb(target_phys_addr_t addr) return ret; } -static uint32_t vga_mem_readw(target_phys_addr_t addr) +static uint32_t vga_mem_readw(void *opaque, target_phys_addr_t addr) { uint32_t v; #ifdef TARGET_WORDS_BIGENDIAN - v = vga_mem_readb(addr) << 8; - v |= vga_mem_readb(addr + 1); + v = vga_mem_readb(opaque, addr) << 8; + v |= vga_mem_readb(opaque, addr + 1); #else - v = vga_mem_readb(addr); - v |= vga_mem_readb(addr + 1) << 8; + v = vga_mem_readb(opaque, addr); + v |= vga_mem_readb(opaque, addr + 1) << 8; #endif return v; } -static uint32_t vga_mem_readl(target_phys_addr_t addr) +static uint32_t vga_mem_readl(void *opaque, target_phys_addr_t addr) { uint32_t v; #ifdef TARGET_WORDS_BIGENDIAN - v = vga_mem_readb(addr) << 24; - v |= vga_mem_readb(addr + 1) << 16; - v |= vga_mem_readb(addr + 2) << 8; - v |= vga_mem_readb(addr + 3); + v = vga_mem_readb(opaque, addr) << 24; + v |= vga_mem_readb(opaque, addr + 1) << 16; + v |= vga_mem_readb(opaque, addr + 2) << 8; + v |= vga_mem_readb(opaque, addr + 3); #else - v = vga_mem_readb(addr); - v |= vga_mem_readb(addr + 1) << 8; - v |= vga_mem_readb(addr + 2) << 16; - v |= vga_mem_readb(addr + 3) << 24; + v = vga_mem_readb(opaque, addr); + v |= vga_mem_readb(opaque, addr + 1) << 8; + v |= vga_mem_readb(opaque, addr + 2) << 16; + v |= vga_mem_readb(opaque, addr + 3) << 24; #endif return v; } /* called for accesses between 0xa0000 and 0xc0000 */ -static void vga_mem_writeb(target_phys_addr_t addr, uint32_t val) +static void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { - VGAState *s = &vga_state; + VGAState *s = opaque; int memory_map_mode, plane, write_mode, b, func_select; uint32_t write_mask, bit_mask, set_mask; @@ -871,29 +871,29 @@ static void vga_mem_writeb(target_phys_addr_t addr, uint32_t val) } } -static void vga_mem_writew(target_phys_addr_t addr, uint32_t val) +static void vga_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { #ifdef TARGET_WORDS_BIGENDIAN - vga_mem_writeb(addr, (val >> 8) & 0xff); - vga_mem_writeb(addr + 1, val & 0xff); + vga_mem_writeb(opaque, addr, (val >> 8) & 0xff); + vga_mem_writeb(opaque, addr + 1, val & 0xff); #else - vga_mem_writeb(addr, val & 0xff); - vga_mem_writeb(addr + 1, (val >> 8) & 0xff); + vga_mem_writeb(opaque, addr, val & 0xff); + vga_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff); #endif } -static void vga_mem_writel(target_phys_addr_t addr, uint32_t val) +static void vga_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { #ifdef TARGET_WORDS_BIGENDIAN - vga_mem_writeb(addr, (val >> 24) & 0xff); - vga_mem_writeb(addr + 1, (val >> 16) & 0xff); - vga_mem_writeb(addr + 2, (val >> 8) & 0xff); - vga_mem_writeb(addr + 3, val & 0xff); + vga_mem_writeb(opaque, addr, (val >> 24) & 0xff); + vga_mem_writeb(opaque, addr + 1, (val >> 16) & 0xff); + vga_mem_writeb(opaque, addr + 2, (val >> 8) & 0xff); + vga_mem_writeb(opaque, addr + 3, val & 0xff); #else - vga_mem_writeb(addr, val & 0xff); - vga_mem_writeb(addr + 1, (val >> 8) & 0xff); - vga_mem_writeb(addr + 2, (val >> 16) & 0xff); - vga_mem_writeb(addr + 3, (val >> 24) & 0xff); + vga_mem_writeb(opaque, addr, val & 0xff); + vga_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff); + vga_mem_writeb(opaque, addr + 2, (val >> 16) & 0xff); + vga_mem_writeb(opaque, addr + 3, (val >> 24) & 0xff); #endif } @@ -1826,7 +1826,7 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, #endif #endif /* CONFIG_BOCHS_VBE */ - vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write); + vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write, s); cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000, vga_io_memory); |