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authorPeter Maydell <peter.maydell@linaro.org>2015-06-26 11:32:58 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-26 11:32:58 +0100
commitccb0c7e122db72d3a5da798c6414d4912bba828f (patch)
treedceae6e3d7ba56cc60aca3167f25c13c76d37a3e /hw
parent0a4a0312bf8b029cbd32a97db2cad669cf65ac49 (diff)
parent4b3bcd016d83cc75f6a495c1db54b6c77f037adc (diff)
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150626' into staging
MIPS patches 2015-06-26 Changes: * MIPS UHI semihosting support * microMIPS32 R6 support # gpg: Signature made Fri Jun 26 10:42:33 2015 BST using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20150626: target-mips: add mips32r6-generic CPU definition target-mips: microMIPS32 R6 POOL16{A, C} instructions target-mips: microMIPS32 R6 Major instructions target-mips: microMIPS32 R6 POOL32{I, C} instructions target-mips: microMIPS32 R6 POOL32F instructions target-mips: microMIPS32 R6 POOL32A{XF} instructions target-mips: microMIPS32 R6 branches and jumps target-mips: add microMIPS32 R6 opcode enum target-mips: signal RI for removed instructions in microMIPS R6 target-mips: raise RI exceptions when FIR.PS = 0 target-mips: rearrange gen_compute_compact_branch target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP target-mips: remove an unused argument target-mips: add microMIPS TLBINV, TLBINVF target-mips: fix {RD, WR}PGPR in microMIPS target-mips: convert host to MIPS errno values when required target-mips: add Unified Hosting Interface (UHI) support target-mips: remove identical code in different branch hw/mips: Do not clear BEV for MIPS malta kernel load include/softmmu-semi.h: Make semihosting support 64-bit clean Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/mips/mips_malta.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 786a8f0638..3082e75340 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -53,6 +53,7 @@
#include "qemu/error-report.h"
#include "hw/empty_slot.h"
#include "sysemu/kvm.h"
+#include "exec/semihost.h"
//#define DEBUG_BOARD_INIT
@@ -634,7 +635,13 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base,
/* Second part of the bootloader */
p = (uint32_t *) (base + 0x580);
- stl_p(p++, 0x24040002); /* addiu a0, zero, 2 */
+
+ if (semihosting_get_argc()) {
+ /* Preserve a0 content as arguments have been passed */
+ stl_p(p++, 0x00000000); /* nop */
+ } else {
+ stl_p(p++, 0x24040002); /* addiu a0, zero, 2 */
+ }
stl_p(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff)); /* lui sp, high(ENVP_ADDR) */
stl_p(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff)); /* ori sp, sp, low(ENVP_ADDR) */
stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
@@ -887,7 +894,7 @@ static void main_cpu_reset(void *opaque)
read only location. The kernel location and the arguments table
location does not change. */
if (loaderparams.kernel_filename) {
- env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
+ env->CP0_Status &= ~(1 << CP0St_ERL);
}
malta_mips_config(cpu);