diff options
author | Andreas Färber <afaerber@suse.de> | 2013-01-16 19:29:31 +0100 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2013-02-16 14:51:00 +0100 |
commit | d77953b94ff20868b21796ee22ca57baa1cfc941 (patch) | |
tree | c98997e02a8a096cb8a1e72220cc129117a11136 /hw | |
parent | fcd7d0034b7eddba505a548f456f452bf5a7d56c (diff) |
cpu: Move current_tb field to CPUState
Explictly NULL it on CPU reset since it was located before breakpoints.
Change vapic_report_tpr_access() argument to CPUState. This also
resolves the use of void* for cpu.h independence.
Change vAPIC patch_instruction() argument to X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/apic_common.c | 2 | ||||
-rw-r--r-- | hw/apic_internal.h | 2 | ||||
-rw-r--r-- | hw/kvmvapic.c | 13 |
3 files changed, 10 insertions, 7 deletions
diff --git a/hw/apic_common.c b/hw/apic_common.c index 6e1b1e0320..d8c9810509 100644 --- a/hw/apic_common.c +++ b/hw/apic_common.c @@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, { APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); - vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access); + vapic_report_tpr_access(s->vapic, CPU(s->cpu), ip, access); } void apic_report_irq_delivered(int delivered) diff --git a/hw/apic_internal.h b/hw/apic_internal.h index dcbbfd41cb..9265e52cd6 100644 --- a/hw/apic_internal.h +++ b/hw/apic_internal.h @@ -143,7 +143,7 @@ bool apic_next_timer(APICCommonState *s, int64_t current_time); void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); void apic_enable_vapic(DeviceState *d, hwaddr paddr); -void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, +void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip, TPRAccess access); #endif /* !QEMU_APIC_INTERNAL_H */ diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c index 1b5f416a78..9265baf568 100644 --- a/hw/kvmvapic.c +++ b/hw/kvmvapic.c @@ -382,8 +382,10 @@ static void patch_call(VAPICROMState *s, CPUX86State *env, target_ulong ip, cpu_memory_rw_debug(env, ip + 1, (void *)&offset, sizeof(offset), 1); } -static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong ip) +static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) { + CPUState *cs = CPU(cpu); + CPUX86State *env = &cpu->env; VAPICHandlers *handlers; uint8_t opcode[2]; uint32_t imm32; @@ -439,17 +441,18 @@ static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong i resume_all_vcpus(); if (!kvm_enabled()) { - env->current_tb = NULL; + cs->current_tb = NULL; tb_gen_code(env, current_pc, current_cs_base, current_flags, 1); cpu_resume_from_signal(env, NULL); } } -void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, +void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip, TPRAccess access) { VAPICROMState *s = DO_UPCAST(VAPICROMState, busdev.qdev, dev); - CPUX86State *env = cpu; + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; cpu_synchronize_state(env); @@ -465,7 +468,7 @@ void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, if (vapic_enable(s, env) < 0) { return; } - patch_instruction(s, env, ip); + patch_instruction(s, cpu, ip); } typedef struct VAPICEnableTPRReporting { |