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authorCédric Le Goater <clg@kaod.org>2020-08-20 16:01:06 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2020-09-08 10:08:42 +1000
commitb31911c6167432edc7dc5dd37e8c01f426576224 (patch)
treea161e2df881086c565e5c20a192cf6cd458114d4 /hw
parent64dbe2c8b823a64ddda5ddef52b7d5a1ddf35d8f (diff)
spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
The sPAPR machine has four different IRQ backends, each implementing the XICS or XIVE interrupt mode or both in the case of the 'dual' backend. If a machine is started in P8 compat mode, QEMU should necessarily support the XICS interrupt mode and in that case, the XIVE-only IRQ backend is invalid. Currently, spapr_irq_check() tests the pointer value to the IRQ backend to check for this condition, instead use the 'xics' flag. It's equivalent and it will ease the introduction of new XIVE-only IRQ backends if needed. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200820140106.2357228-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/spapr_irq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index 72bb938375..f59960339e 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp)
* To cover both and not confuse the OS, add an early failure in
* QEMU.
*/
- if (spapr->irq == &spapr_irq_xive) {
+ if (!spapr->irq->xics) {
error_setg(errp, "XIVE-only machines require a POWER9 CPU");
return -1;
}