diff options
author | Benoît Canet <benoit.canet@gmail.com> | 2011-11-24 14:31:20 +0100 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2011-11-28 15:38:43 +0200 |
commit | 845cbeb8e3fd62598414baae98a851af355cd728 (patch) | |
tree | 29189c9c3d2d1acb7886dd8b4836df4390270764 /hw | |
parent | 183e1d40dbd2284486739ced2cc7c2b5a71b3d9b (diff) |
bonito: convert south bridge pci config to memory API
Signed-off-by: Benoît Canet <benoit.canet@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/bonito.c | 39 |
1 files changed, 18 insertions, 21 deletions
diff --git a/hw/bonito.c b/hw/bonito.c index 4972b9496c..ab5c00dc89 100644 --- a/hw/bonito.c +++ b/hw/bonito.c @@ -203,10 +203,6 @@ typedef struct PCIBonitoState /* Bonito registers */ MemoryRegion iomem; - target_phys_addr_t bonito_spciconf_start; - target_phys_addr_t bonito_spciconf_length; - int bonito_spciconf_handle; - target_phys_addr_t bonito_pciio_start; target_phys_addr_t bonito_pciio_length; int bonito_pciio_handle; @@ -596,16 +592,20 @@ static uint32_t bonito_spciconf_readl(void *opaque, target_phys_addr_t addr) } /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */ -static CPUWriteMemoryFunc * const bonito_spciconf_write[] = { - bonito_spciconf_writeb, - bonito_spciconf_writew, - bonito_spciconf_writel, -}; - -static CPUReadMemoryFunc * const bonito_spciconf_read[] = { - bonito_spciconf_readb, - bonito_spciconf_readw, - bonito_spciconf_readl, +static const MemoryRegionOps bonito_spciconf_ops = { + .old_mmio = { + .read = { + bonito_spciconf_readb, + bonito_spciconf_readw, + bonito_spciconf_readl, + }, + .write = { + bonito_spciconf_writeb, + bonito_spciconf_writew, + bonito_spciconf_writel, + }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; #define BONITO_IRQ_BASE 32 @@ -702,13 +702,10 @@ static int bonito_initfn(PCIDevice *dev) sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE); /* set the south bridge pci configure mapping */ - s->bonito_spciconf_handle = cpu_register_io_memory(bonito_spciconf_read, - bonito_spciconf_write, s, - DEVICE_NATIVE_ENDIAN); - s->bonito_spciconf_start = BONITO_SPCICONFIG_BASE; - s->bonito_spciconf_length = BONITO_SPCICONFIG_SIZE; - cpu_register_physical_memory(s->bonito_spciconf_start, s->bonito_spciconf_length, - s->bonito_spciconf_handle); + memory_region_init_io(&s->pcihost->data_mem, &bonito_spciconf_ops, s, + "south-bridge-pci-config", BONITO_SPCICONFIG_SIZE); + sysbus_init_mmio_region(sysbus, &s->pcihost->data_mem); + sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE); s->bonito_ldma_handle = cpu_register_io_memory(bonito_ldma_read, bonito_ldma_write, s, |