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authorPeter Maydell <peter.maydell@linaro.org>2018-04-10 15:18:58 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-04-10 15:18:58 +0100
commitf41ee66df0ceef0002644d08a61a6a929674898d (patch)
tree879731a4ccd2a0a276489e615257825d94e37770 /hw
parentdf6378eb0e6cfd58a22a1c3ff8fa4a9039f1eaa8 (diff)
parentbd49e6027cbc207c87633c7add3ebd7d3474cd35 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180410' into staging
target-arm queue: * fpu: Fix rounding mode for floatN_to_uintM_round_to_zero * tcg: Fix guest state corruption when running 64-bit Arm guests on a 32-bit host (especially when using icount) * linux-user/signal.c: Ensure AArch64 signal frame isn't too small * cpus.c: ensure running CPU recalculates icount deadlines on timer expiry * target/arm: Report unsupported MPU region sizes more clearly * hw/arm/fsl-imx: Fix introspection problem with fsl-imx6 and fsl-imx7 * hw/arm/allwinner-a10: Do not use nd_table in instance_init function * hw/sd/bcm2835_sdhost: Don't raise spurious interrupts * hw/sd/bcm2835_sdhost: Add tracepoints * target-arm: Check undefined opcodes for SWP in A32 decoder * hw/arm/integratorcp: Don't do things that could be fatal in the instance_init * hw/arm: Allow manually specified /psci node # gpg: Signature made Tue 10 Apr 2018 13:16:12 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180410: fpu: Fix rounding mode for floatN_to_uintM_round_to_zero tcg: Introduce tcg_set_insn_start_param linux-user/signal.c: Ensure AArch64 signal frame isn't too small cpus.c: ensure running CPU recalculates icount deadlines on timer expiry target/arm: Report unsupported MPU region sizes more clearly hw/arm/fsl-imx: Fix introspection problem with fsl-imx6 and fsl-imx7 hw/arm/allwinner-a10: Do not use nd_table in instance_init function hw/sd/bcm2835_sdhost: Don't raise spurious interrupts hw/sd/bcm2835_sdhost: Add tracepoints target-arm: Check undefined opcodes for SWP in A32 decoder hw/arm/integratorcp: Don't do things that could be fatal in the instance_init hw/arm: Allow manually specified /psci node Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/allwinner-a10.c12
-rw-r--r--hw/arm/boot.c10
-rw-r--r--hw/arm/fsl-imx6.c14
-rw-r--r--hw/arm/fsl-imx7.c13
-rw-r--r--hw/arm/integratorcp.c23
-rw-r--r--hw/sd/bcm2835_sdhost.c54
-rw-r--r--hw/sd/trace-events6
7 files changed, 86 insertions, 46 deletions
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 43a3f01f45..5dbbacb7e8 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -38,11 +38,6 @@ static void aw_a10_init(Object *obj)
object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC);
qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default());
- /* FIXME use qdev NIC properties instead of nd_table[] */
- if (nd_table[0].used) {
- qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
- qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
- }
object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI);
qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
@@ -91,6 +86,11 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sysbusdev, 4, s->irq[67]);
sysbus_connect_irq(sysbusdev, 5, s->irq[68]);
+ /* FIXME use qdev NIC properties instead of nd_table[] */
+ if (nd_table[0].used) {
+ qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
+ qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
+ }
object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);
@@ -118,7 +118,7 @@ static void aw_a10_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = aw_a10_realize;
- /* Reason: Uses serial_hds in realize and nd_table in instance_init */
+ /* Reason: Uses serial_hds and nd_table in realize function */
dc->user_creatable = false;
}
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 9319b12fcd..26184bcd7c 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -422,6 +422,7 @@ static void fdt_add_psci_node(void *fdt)
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
const char *psci_method;
int64_t psci_conduit;
+ int rc;
psci_conduit = object_property_get_int(OBJECT(armcpu),
"psci-conduit",
@@ -439,6 +440,15 @@ static void fdt_add_psci_node(void *fdt)
g_assert_not_reached();
}
+ /*
+ * If /psci node is present in provided DTB, assume that no fixup
+ * is necessary and all PSCI configuration should be taken as-is
+ */
+ rc = fdt_path_offset(fdt, "/psci");
+ if (rc >= 0) {
+ return;
+ }
+
qemu_fdt_add_subnode(fdt, "/psci");
if (armcpu->psci_version == 2) {
const char comp[] = "arm,psci-0.2\0arm,psci";
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index b6ac72de27..9dfbc9a8c4 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -37,13 +37,7 @@ static void fsl_imx6_init(Object *obj)
char name[NAME_SIZE];
int i;
- if (smp_cpus > FSL_IMX6_NUM_CPUS) {
- error_report("%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
- exit(1);
- }
-
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
"cortex-a9-" TYPE_ARM_CPU);
snprintf(name, NAME_SIZE, "cpu%d", i);
@@ -119,6 +113,12 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
uint16_t i;
Error *err = NULL;
+ if (smp_cpus > FSL_IMX6_NUM_CPUS) {
+ error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
+ TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
+ return;
+ }
+
for (i = 0; i < smp_cpus; i++) {
/* On uniprocessor, the CBAR is set to 0 */
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 26ef36c79a..390b4310e6 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -35,13 +35,8 @@ static void fsl_imx7_init(Object *obj)
char name[NAME_SIZE];
int i;
- if (smp_cpus > FSL_IMX7_NUM_CPUS) {
- error_report("%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX7, FSL_IMX7_NUM_CPUS, smp_cpus);
- exit(1);
- }
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a7"));
snprintf(name, NAME_SIZE, "cpu%d", i);
@@ -197,6 +192,12 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
qemu_irq irq;
char name[NAME_SIZE];
+ if (smp_cpus > FSL_IMX7_NUM_CPUS) {
+ error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
+ TYPE_FSL_IMX7, FSL_IMX7_NUM_CPUS, smp_cpus);
+ return;
+ }
+
for (i = 0; i < smp_cpus; i++) {
o = OBJECT(&s->cpu[i]);
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index e8303b83be..58b40efc19 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -266,7 +266,6 @@ static const MemoryRegionOps integratorcm_ops = {
static void integratorcm_init(Object *obj)
{
IntegratorCMState *s = INTEGRATOR_CM(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
s->cm_osc = 0x01000048;
/* ??? What should the high bits of this value be? */
@@ -276,20 +275,28 @@ static void integratorcm_init(Object *obj)
s->cm_init = 0x00000112;
s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24,
1000);
- memory_region_init_ram(&s->flash, obj, "integrator.flash", 0x100000,
- &error_fatal);
- memory_region_init_io(&s->iomem, obj, &integratorcm_ops, s,
- "integratorcm", 0x00800000);
- sysbus_init_mmio(dev, &s->iomem);
-
- integratorcm_do_remap(s);
/* ??? Save/restore. */
}
static void integratorcm_realize(DeviceState *d, Error **errp)
{
IntegratorCMState *s = INTEGRATOR_CM(d);
+ SysBusDevice *dev = SYS_BUS_DEVICE(d);
+ Error *local_err = NULL;
+
+ memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash", 0x100000,
+ &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ memory_region_init_io(&s->iomem, OBJECT(d), &integratorcm_ops, s,
+ "integratorcm", 0x00800000);
+ sysbus_init_mmio(dev, &s->iomem);
+
+ integratorcm_do_remap(s);
if (s->memsz >= 256) {
integrator_spd[31] = 64;
diff --git a/hw/sd/bcm2835_sdhost.c b/hw/sd/bcm2835_sdhost.c
index f7f4e656df..ebf3b926c2 100644
--- a/hw/sd/bcm2835_sdhost.c
+++ b/hw/sd/bcm2835_sdhost.c
@@ -15,6 +15,7 @@
#include "qemu/log.h"
#include "sysemu/blockdev.h"
#include "hw/sd/bcm2835_sdhost.h"
+#include "trace.h"
#define TYPE_BCM2835_SDHOST_BUS "bcm2835-sdhost-bus"
#define BCM2835_SDHOST_BUS(obj) \
@@ -99,6 +100,7 @@ static void bcm2835_sdhost_update_irq(BCM2835SDHostState *s)
{
uint32_t irq = s->status &
(SDHSTS_BUSY_IRPT | SDHSTS_BLOCK_IRPT | SDHSTS_SDIO_IRPT);
+ trace_bcm2835_sdhost_update_irq(irq);
qemu_set_irq(s->irq, !!irq);
}
@@ -135,6 +137,12 @@ static void bcm2835_sdhost_send_command(BCM2835SDHostState *s)
}
#undef RWORD
}
+ /* We never really delay commands, so if this was a 'busywait' command
+ * then we've completed it now and can raise the interrupt.
+ */
+ if ((s->cmd & SDCMD_BUSYWAIT) && (s->config & SDHCFG_BUSY_IRPT_EN)) {
+ s->status |= SDHSTS_BUSY_IRPT;
+ }
return;
error:
@@ -185,18 +193,27 @@ static void bcm2835_sdhost_fifo_run(BCM2835SDHostState *s)
n++;
if (n == 4) {
bcm2835_sdhost_fifo_push(s, value);
+ s->status |= SDHSTS_DATA_FLAG;
+ if (s->config & SDHCFG_DATA_IRPT_EN) {
+ s->status |= SDHSTS_SDIO_IRPT;
+ }
n = 0;
value = 0;
}
}
if (n != 0) {
bcm2835_sdhost_fifo_push(s, value);
+ s->status |= SDHSTS_DATA_FLAG;
}
} else { /* write */
n = 0;
while (s->datacnt > 0 && (s->fifo_len > 0 || n > 0)) {
if (n == 0) {
value = bcm2835_sdhost_fifo_pop(s);
+ s->status |= SDHSTS_DATA_FLAG;
+ if (s->config & SDHCFG_DATA_IRPT_EN) {
+ s->status |= SDHSTS_SDIO_IRPT;
+ }
n = 4;
}
n--;
@@ -205,30 +222,23 @@ static void bcm2835_sdhost_fifo_run(BCM2835SDHostState *s)
value >>= 8;
}
}
- }
- if (s->datacnt == 0) {
- s->status |= SDHSTS_DATA_FLAG;
-
- s->edm &= ~0xf;
- s->edm |= SDEDM_FSM_DATAMODE;
-
- if (s->config & SDHCFG_DATA_IRPT_EN) {
- s->status |= SDHSTS_SDIO_IRPT;
- }
-
- if ((s->cmd & SDCMD_BUSYWAIT) && (s->config & SDHCFG_BUSY_IRPT_EN)) {
- s->status |= SDHSTS_BUSY_IRPT;
- }
-
- if ((s->cmd & SDCMD_WRITE_CMD) && (s->config & SDHCFG_BLOCK_IRPT_EN)) {
- s->status |= SDHSTS_BLOCK_IRPT;
+ if (s->datacnt == 0) {
+ s->edm &= ~SDEDM_FSM_MASK;
+ s->edm |= SDEDM_FSM_DATAMODE;
+ trace_bcm2835_sdhost_edm_change("datacnt 0", s->edm);
+
+ if ((s->cmd & SDCMD_WRITE_CMD) &&
+ (s->config & SDHCFG_BLOCK_IRPT_EN)) {
+ s->status |= SDHSTS_BLOCK_IRPT;
+ }
}
-
- bcm2835_sdhost_update_irq(s);
}
+ bcm2835_sdhost_update_irq(s);
+
s->edm &= ~(0x1f << 4);
s->edm |= ((s->fifo_len & 0x1f) << 4);
+ trace_bcm2835_sdhost_edm_change("fifo run", s->edm);
}
static uint64_t bcm2835_sdhost_read(void *opaque, hwaddr offset,
@@ -280,6 +290,8 @@ static uint64_t bcm2835_sdhost_read(void *opaque, hwaddr offset,
break;
}
+ trace_bcm2835_sdhost_read(offset, res, size);
+
return res;
}
@@ -288,6 +300,8 @@ static void bcm2835_sdhost_write(void *opaque, hwaddr offset,
{
BCM2835SDHostState *s = (BCM2835SDHostState *)opaque;
+ trace_bcm2835_sdhost_write(offset, value, size);
+
switch (offset) {
case SDCMD:
s->cmd = value;
@@ -314,6 +328,7 @@ static void bcm2835_sdhost_write(void *opaque, hwaddr offset,
value &= ~0xf;
}
s->edm = value;
+ trace_bcm2835_sdhost_edm_change("guest register write", s->edm);
break;
case SDHCFG:
s->config = value;
@@ -390,6 +405,7 @@ static void bcm2835_sdhost_reset(DeviceState *dev)
s->cmd = 0;
s->cmdarg = 0;
s->edm = 0x0000c60f;
+ trace_bcm2835_sdhost_edm_change("device reset", s->edm);
s->config = 0;
s->hbct = 0;
s->hblc = 0;
diff --git a/hw/sd/trace-events b/hw/sd/trace-events
index 2059ace61f..bfd1d62efc 100644
--- a/hw/sd/trace-events
+++ b/hw/sd/trace-events
@@ -1,5 +1,11 @@
# See docs/devel/tracing.txt for syntax documentation.
+# hw/sd/bcm2835_sdhost.c
+bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
+bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
+bcm2835_sdhost_edm_change(const char *why, uint32_t edm) "(%s) EDM now 0x%x"
+bcm2835_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%x\n"
+
# hw/sd/core.c
sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg, uint8_t crc) "@%s CMD%02d arg 0x%08x crc 0x%02x"
sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x"