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authorAndreas Färber <afaerber@suse.de>2013-07-27 15:07:44 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-29 21:07:02 +0200
commitb91f0dfd12dbd117235409980e77523fba5f8978 (patch)
treea7ae328a637285a6980978a17289bf3adbcf9a1e /hw
parentb564b137b92c5356ffe3c308defa9d0d324272d9 (diff)
pl031: Rename pl031_state to PL031State
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw')
-rw-r--r--hw/timer/pl031.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c
index 3ce6ed8ae1..e705a69d1f 100644
--- a/hw/timer/pl031.c
+++ b/hw/timer/pl031.c
@@ -33,7 +33,7 @@ do { printf("pl031: " fmt , ## __VA_ARGS__); } while (0)
#define RTC_MIS 0x18 /* Masked interrupt status register */
#define RTC_ICR 0x1c /* Interrupt clear register */
-typedef struct {
+typedef struct PL031State {
SysBusDevice busdev;
MemoryRegion iomem;
QEMUTimer *timer;
@@ -51,34 +51,34 @@ typedef struct {
uint32_t cr;
uint32_t im;
uint32_t is;
-} pl031_state;
+} PL031State;
static const unsigned char pl031_id[] = {
0x31, 0x10, 0x14, 0x00, /* Device ID */
0x0d, 0xf0, 0x05, 0xb1 /* Cell ID */
};
-static void pl031_update(pl031_state *s)
+static void pl031_update(PL031State *s)
{
qemu_set_irq(s->irq, s->is & s->im);
}
static void pl031_interrupt(void * opaque)
{
- pl031_state *s = (pl031_state *)opaque;
+ PL031State *s = (PL031State *)opaque;
s->is = 1;
DPRINTF("Alarm raised\n");
pl031_update(s);
}
-static uint32_t pl031_get_count(pl031_state *s)
+static uint32_t pl031_get_count(PL031State *s)
{
int64_t now = qemu_get_clock_ns(rtc_clock);
return s->tick_offset + now / get_ticks_per_sec();
}
-static void pl031_set_alarm(pl031_state *s)
+static void pl031_set_alarm(PL031State *s)
{
uint32_t ticks;
@@ -98,7 +98,7 @@ static void pl031_set_alarm(pl031_state *s)
static uint64_t pl031_read(void *opaque, hwaddr offset,
unsigned size)
{
- pl031_state *s = (pl031_state *)opaque;
+ PL031State *s = (PL031State *)opaque;
if (offset >= 0xfe0 && offset < 0x1000)
return pl031_id[(offset - 0xfe0) >> 2];
@@ -136,7 +136,7 @@ static uint64_t pl031_read(void *opaque, hwaddr offset,
static void pl031_write(void * opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- pl031_state *s = (pl031_state *)opaque;
+ PL031State *s = (PL031State *)opaque;
switch (offset) {
@@ -189,7 +189,7 @@ static const MemoryRegionOps pl031_ops = {
static int pl031_init(SysBusDevice *dev)
{
- pl031_state *s = FROM_SYSBUS(pl031_state, dev);
+ PL031State *s = FROM_SYSBUS(PL031State, dev);
struct tm tm;
memory_region_init_io(&s->iomem, OBJECT(s), &pl031_ops, s, "pl031", 0x1000);
@@ -205,7 +205,7 @@ static int pl031_init(SysBusDevice *dev)
static void pl031_pre_save(void *opaque)
{
- pl031_state *s = opaque;
+ PL031State *s = opaque;
/* tick_offset is base_time - rtc_clock base time. Instead, we want to
* store the base time relative to the vm_clock for backwards-compatibility. */
@@ -215,7 +215,7 @@ static void pl031_pre_save(void *opaque)
static int pl031_post_load(void *opaque, int version_id)
{
- pl031_state *s = opaque;
+ PL031State *s = opaque;
int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock);
s->tick_offset = s->tick_offset_vmstate - delta / get_ticks_per_sec();
@@ -230,12 +230,12 @@ static const VMStateDescription vmstate_pl031 = {
.pre_save = pl031_pre_save,
.post_load = pl031_post_load,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(tick_offset_vmstate, pl031_state),
- VMSTATE_UINT32(mr, pl031_state),
- VMSTATE_UINT32(lr, pl031_state),
- VMSTATE_UINT32(cr, pl031_state),
- VMSTATE_UINT32(im, pl031_state),
- VMSTATE_UINT32(is, pl031_state),
+ VMSTATE_UINT32(tick_offset_vmstate, PL031State),
+ VMSTATE_UINT32(mr, PL031State),
+ VMSTATE_UINT32(lr, PL031State),
+ VMSTATE_UINT32(cr, PL031State),
+ VMSTATE_UINT32(im, PL031State),
+ VMSTATE_UINT32(is, PL031State),
VMSTATE_END_OF_LIST()
}
};
@@ -253,7 +253,7 @@ static void pl031_class_init(ObjectClass *klass, void *data)
static const TypeInfo pl031_info = {
.name = "pl031",
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(pl031_state),
+ .instance_size = sizeof(PL031State),
.class_init = pl031_class_init,
};