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authorPeter Maydell <peter.maydell@linaro.org>2016-02-29 11:24:36 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-02-29 11:24:36 +0000
commit3ff430aa91f33388cce88d81edcad8b2ac5a7a9f (patch)
treec1492be36a503161385a851ded731f8b8648ae32 /hw
parent35227e6a09a274b1496bfe16cbe2008e85fbeb5a (diff)
parente6915b5f3a874a467a9a65f7ec1d6ef8d251a51a (diff)
Merge remote-tracking branch 'remotes/kraxel/tags/pull-fw-cfg-20160226-1' into staging
fw_cfg: unbreak migration compatibility for 2.4 and earlier machines # gpg: Signature made Fri 26 Feb 2016 09:45:50 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-fw-cfg-20160226-1: fw_cfg: unbreak migration compatibility for 2.4 and earlier machines Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/nvram/fw_cfg.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index 79c5742b33..f3acb47bd4 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -778,17 +778,19 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
DeviceState *dev;
FWCfgState *s;
uint32_t version = FW_CFG_VERSION;
- bool dma_enabled = dma_iobase && dma_as;
+ bool dma_requested = dma_iobase && dma_as;
dev = qdev_create(NULL, TYPE_FW_CFG_IO);
qdev_prop_set_uint32(dev, "iobase", iobase);
qdev_prop_set_uint32(dev, "dma_iobase", dma_iobase);
- qdev_prop_set_bit(dev, "dma_enabled", dma_enabled);
+ if (!dma_requested) {
+ qdev_prop_set_bit(dev, "dma_enabled", false);
+ }
fw_cfg_init1(dev);
s = FW_CFG(dev);
- if (dma_enabled) {
+ if (s->dma_enabled) {
/* 64 bits for the address field */
s->dma_as = dma_as;
s->dma_addr = 0;
@@ -814,11 +816,13 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
SysBusDevice *sbd;
FWCfgState *s;
uint32_t version = FW_CFG_VERSION;
- bool dma_enabled = dma_addr && dma_as;
+ bool dma_requested = dma_addr && dma_as;
dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
qdev_prop_set_uint32(dev, "data_width", data_width);
- qdev_prop_set_bit(dev, "dma_enabled", dma_enabled);
+ if (!dma_requested) {
+ qdev_prop_set_bit(dev, "dma_enabled", false);
+ }
fw_cfg_init1(dev);
@@ -828,7 +832,7 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
s = FW_CFG(dev);
- if (dma_enabled) {
+ if (s->dma_enabled) {
s->dma_as = dma_as;
s->dma_addr = 0;
sysbus_mmio_map(sbd, 2, dma_addr);
@@ -873,7 +877,7 @@ static Property fw_cfg_io_properties[] = {
DEFINE_PROP_UINT32("iobase", FWCfgIoState, iobase, -1),
DEFINE_PROP_UINT32("dma_iobase", FWCfgIoState, dma_iobase, -1),
DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled,
- false),
+ true),
DEFINE_PROP_END_OF_LIST(),
};
@@ -913,7 +917,7 @@ static const TypeInfo fw_cfg_io_info = {
static Property fw_cfg_mem_properties[] = {
DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState, parent_obj.dma_enabled,
- false),
+ true),
DEFINE_PROP_END_OF_LIST(),
};