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authorAndreas Färber <afaerber@suse.de>2012-12-17 03:27:07 +0100
committerAndreas Färber <afaerber@suse.de>2013-01-15 04:09:13 +0100
commitce3960ebe57d0601a3628b64adac6fd23c901f70 (patch)
tree0f3cbd92e527d7164bcdd88c6d624d2d6834498c /hw
parentcf7c3f0cb5a7129f57fa9e69d410d6a05031988c (diff)
cpu: Move nr_{cores,threads} fields to CPUState
To facilitate the field movements, pass MIPSCPU to malta_mips_config(); avoid that for mips_cpu_map_tc() since callers only access MIPS Thread Contexts, inside TCG helpers. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw')
-rw-r--r--hw/mips_malta.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 2250e675a5..771d1256d7 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -743,10 +743,13 @@ static int64_t load_kernel (void)
return kernel_entry;
}
-static void malta_mips_config(CPUMIPSState *env)
+static void malta_mips_config(MIPSCPU *cpu)
{
+ CPUMIPSState *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
+
env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |
- ((smp_cpus * env->nr_threads - 1) << CP0MVPC0_PTC);
+ ((smp_cpus * cs->nr_threads - 1) << CP0MVPC0_PTC);
}
static void main_cpu_reset(void *opaque)
@@ -763,7 +766,7 @@ static void main_cpu_reset(void *opaque)
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
}
- malta_mips_config(env);
+ malta_mips_config(cpu);
}
static void cpu_request_exit(void *opaque, int irq, int level)