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authorLaszlo Ast <laszlo.ast@siemens-enterprise.com>2009-11-19 11:07:12 +0100
committerAnthony Liguori <aliguori@us.ibm.com>2009-12-03 09:41:40 -0600
commita15fdf861976d0c4a7358e4ddd729116bcd34348 (patch)
treef23cdf3ac89c0453c81efd3c6b19f9872b47c584 /hw
parentbd536cf3302e258cace9cfa9f554ec9f9e27591a (diff)
lsi53c895a: Whitespace and typo fixes
Signed-off-by: Laszlo Ast <laszlo.ast@siemens-enterprise.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/lsi53c895a.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 8b8a80b898..f0e8be9303 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -10,7 +10,7 @@
/* ??? Need to check if the {read,write}[wl] routines work properly on
big-endian targets. */
-#include <assert.h> \
+#include <assert.h>
#include "hw.h"
#include "pci.h"
@@ -185,7 +185,7 @@ typedef struct {
int carry; /* ??? Should this be an a visible register somewhere? */
int sense;
/* Action to take at the end of a MSG IN phase.
- 0 = COMMAND, 1 = disconect, 2 = DATA OUT, 3 = DATA IN. */
+ 0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN. */
int msg_action;
int msg_len;
uint8_t msg[LSI_MAX_MSGIN_LEN];
@@ -1062,7 +1062,7 @@ again:
lsi_set_phase(s, PHASE_MO);
break;
case 1: /* Disconnect */
- DPRINTF("Wait Disconect\n");
+ DPRINTF("Wait Disconnect\n");
s->scntl1 &= ~LSI_SCNTL1_CON;
break;
case 2: /* Wait Reselect */
@@ -1554,9 +1554,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
SCRIPTS register move instructions are. */
s->sfbr = val;
break;
- case 0x0a: case 0x0b:
+ case 0x0a: case 0x0b:
/* Openserver writes to these readonly registers on startup */
- return;
+ return;
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
/* Linux writes to these readonly registers on startup. */
return;