diff options
author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-02-22 15:52:03 -0300 |
---|---|---|
committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-01 13:47:14 -0800 |
commit | c95c9d200e22b17858ec9287b6a9716d053e48aa (patch) | |
tree | 5b981af867efbe08dcde6dd929cc6575696aece0 /hw | |
parent | 3fe40ef5a90d62e5695c18ec8aa517a0694ce7ed (diff) |
hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
Read cpu_ptr->cfg.mmu directly. As a bonus, use cpu_ptr in
riscv_isa_string().
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230222185205.355361-9-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/riscv/virt.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 86c4adc0c9..49f2c157f7 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -232,20 +232,21 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket, bool is_32_bit = riscv_is_32bit(&s->soc[0]); for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) { + RISCVCPU *cpu_ptr = &s->soc[socket].harts[cpu]; + cpu_phandle = (*phandle)++; cpu_name = g_strdup_printf("/cpus/cpu@%d", s->soc[socket].hartid_base + cpu); qemu_fdt_add_subnode(ms->fdt, cpu_name); - if (riscv_feature(&s->soc[socket].harts[cpu].env, - RISCV_FEATURE_MMU)) { + if (cpu_ptr->cfg.mmu) { qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", (is_32_bit) ? "riscv,sv32" : "riscv,sv48"); } else { qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", "riscv,none"); } - name = riscv_isa_string(&s->soc[socket].harts[cpu]); + name = riscv_isa_string(cpu_ptr); qemu_fdt_setprop_string(ms->fdt, cpu_name, "riscv,isa", name); g_free(name); qemu_fdt_setprop_string(ms->fdt, cpu_name, "compatible", "riscv"); |