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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-07-29 17:34:59 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-07-29 17:34:59 +0000
commita5236105dbf7b971715f1ac55f52f716081a0632 (patch)
treed02caf682dccfdbfba59d668e739ca9782c3a73e /hw
parent2b8f2d4165de7095b58927138458b8d30775891e (diff)
Word-reads from spitz NAND controller, patch by Juergen Lock.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3090 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/spitz.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/hw/spitz.c b/hw/spitz.c
index c6fb598f49..eaea2e9763 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -78,6 +78,18 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
return 0;
}
+static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
+{
+ struct sl_nand_s *s = (struct sl_nand_s *) opaque;
+ addr -= s->target_base;
+
+ if (addr == FLASH_FLASHIO)
+ return ecc_digest(&s->ecc, nand_getio(s->nand)) |
+ (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
+
+ return sl_readb(opaque, addr);
+}
+
static void sl_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
@@ -139,7 +151,7 @@ static void sl_flash_register(struct pxa2xx_state_s *cpu, int size)
CPUReadMemoryFunc *sl_readfn[] = {
sl_readb,
sl_readb,
- sl_readb,
+ sl_readl,
};
CPUWriteMemoryFunc *sl_writefn[] = {
sl_writeb,