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authorStefan Hajnoczi <stefanha@redhat.com>2023-10-02 14:42:30 -0400
committerStefan Hajnoczi <stefanha@redhat.com>2023-10-02 14:42:30 -0400
commit5d7e601df37d8bdd490472fd4cfe3e4ca258df09 (patch)
tree102a7ea1ca07f51a2297d23324f377858f0fc076 /hw
parenta3108b2d92eda76b4dbe0c95051899628e28f6ac (diff)
parent4dba9141f97e66fdd920df37c4aa7b2ffe0d6a4a (diff)
Merge tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru into staging
-Wshadow=local patches patches for 2023-09-29 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmUWhnsSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTDBkP/2E8cyH+fn7yehNAZT8fjBuDBaj0x3wf # Bs4++bMEZpgfA/11le/Mm+N9BFDtoGj4dnDwQ0yN6bcKcfmNvxh+M+lNaRO+xvXA # qs/kJtFYkJYuEj1wgKK2XXd4YcD/S4Qap+FSuUBv8KE/oeALkB1fEpvMcwtJtQqc # 7POQEqYNQfUe+MX/wKZ+qditbbrFRwX69dAd8+nGTbFestXd2uFA5I5kv3ebxELg # VjTBgQdp7s82iTvoXpTtmQ6A9ba13zmelxmsAMLlAihkbffMwbtbrkQ7qIIUOW1o # I4WPxhIXXyZbB48qARUq5G3GQuh+7dRArcpYWaFel2a6cjm2Z6NmWJeRAr0cIaWV # P5B79k7DO551YsBZn+ubH0U+qwMLw+zq2apQ+SeH/loE0pP/c2OBOPtaVI46D0Dh # 2kgaSuTIy9AByAHoYBxKnxy4TVwPKzk8hdzCQdiRSO7KJdMqMsV+/w1eR4oH9dsf # CAvJXVzLicFMMABA/4O99K+1yjIOQpwmiqAjc+gV6FdhwllSH3yQDiK4RMWNAwRu # bRQHBCk143t7cM3ts09T+5QxkWB3U0iGMJ4rpn43yjH5xwlWmpTlztvd7XlXwyTR # 8j2Z+8qxe992HmVk34rKdkGnu0qz4AhJBgAEEk2e0oepZvjfigqodQwEMCQsse5t # cH51HzTDuen/ # =XVKC # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Sep 2023 04:10:35 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru: (56 commits) disas/m68k: clean up local variable shadowing hw/nvme: Clean up local variable shadowing in nvme_ns_init() softmmu/device_tree: Fixup local variables shadowing target/riscv: vector_helper: Fixup local variables shadowing target/riscv: cpu: Fixup local variables shadowing hw/riscv: opentitan: Fixup local variables shadowing qemu-nbd: changes towards enabling -Wshadow=local seccomp: avoid shadowing of 'action' variable crypto: remove shadowed 'ret' variable intel_iommu: Fix shadow local variables on "size" aspeed/timer: Clean up local variable shadowing aspeed/i3c: Rename variable shadowing a local aspeed: Clean up local variable shadowing aspeed/i2c: Clean up local variable shadowing hw/arm/smmuv3-internal.h: Don't use locals in statement macros hw/arm/smmuv3.c: Avoid shadowing variable hw/misc/arm_sysctl.c: Avoid shadowing local variable hw/intc/arm_gicv3_its: Avoid shadowing variable in do_process_its_cmd() hw/acpi: changes towards enabling -Wshadow=local test-throttle: don't shadow 'index' variable in do_test_accounting() ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/acpi/cpu_hotplug.c25
-rw-r--r--hw/arm/allwinner-r40.c7
-rw-r--r--hw/arm/armsse.c16
-rw-r--r--hw/arm/armv7m.c2
-rw-r--r--hw/arm/aspeed_ast2600.c10
-rw-r--r--hw/arm/smmuv3-internal.h43
-rw-r--r--hw/arm/smmuv3.c4
-rw-r--r--hw/arm/virt.c3
-rw-r--r--hw/block/xen-block.c6
-rw-r--r--hw/core/machine.c2
-rw-r--r--hw/i2c/aspeed_i2c.c1
-rw-r--r--hw/i386/acpi-build.c24
-rw-r--r--hw/i386/intel_iommu.c8
-rw-r--r--hw/intc/arm_gicv3_its.c6
-rw-r--r--hw/intc/openpic.c7
-rw-r--r--hw/m68k/bootinfo.h10
-rw-r--r--hw/microblaze/petalogix_ml605_mmu.c2
-rw-r--r--hw/misc/arm_sysctl.c6
-rw-r--r--hw/misc/aspeed_i3c.c6
-rw-r--r--hw/nios2/10m50_devboard.c4
-rw-r--r--hw/nvme/ns.c4
-rw-r--r--hw/ppc/pnv_psi.c5
-rw-r--r--hw/ppc/spapr.c42
-rw-r--r--hw/ppc/spapr_drc.c12
-rw-r--r--hw/ppc/spapr_pci.c6
-rw-r--r--hw/riscv/opentitan.c2
-rw-r--r--hw/smbios/smbios.c37
-rw-r--r--hw/timer/aspeed_timer.c2
28 files changed, 139 insertions, 163 deletions
diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
index ff14c3f410..634bbecb31 100644
--- a/hw/acpi/cpu_hotplug.c
+++ b/hw/acpi/cpu_hotplug.c
@@ -265,26 +265,27 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
/* build Processor object for each processor */
for (i = 0; i < apic_ids->len; i++) {
- int apic_id = apic_ids->cpus[i].arch_id;
+ int cpu_apic_id = apic_ids->cpus[i].arch_id;
- assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
+ assert(cpu_apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
- dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
+ dev = aml_processor(i, 0, 0, "CP%.02X", cpu_apic_id);
method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
aml_append(method,
- aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
+ aml_return(aml_call2(CPU_MAT_METHOD,
+ aml_int(cpu_apic_id), aml_int(i))
));
aml_append(dev, method);
method = aml_method("_STA", 0, AML_NOTSERIALIZED);
aml_append(method,
- aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
+ aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(cpu_apic_id))));
aml_append(dev, method);
method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
aml_append(method,
- aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
+ aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(cpu_apic_id),
aml_arg(0)))
);
aml_append(dev, method);
@@ -298,11 +299,11 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
/* Arg0 = APIC ID */
method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
for (i = 0; i < apic_ids->len; i++) {
- int apic_id = apic_ids->cpus[i].arch_id;
+ int cpu_apic_id = apic_ids->cpus[i].arch_id;
- if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
+ if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(cpu_apic_id)));
aml_append(if_ctx,
- aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
+ aml_notify(aml_name("CP%.02X", cpu_apic_id), aml_arg(1))
);
aml_append(method, if_ctx);
}
@@ -319,13 +320,13 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
aml_varpackage(x86ms->apic_id_limit);
for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
- int apic_id = apic_ids->cpus[i].arch_id;
+ int cpu_apic_id = apic_ids->cpus[i].arch_id;
- for (; apic_idx < apic_id; apic_idx++) {
+ for (; apic_idx < cpu_apic_id; apic_idx++) {
aml_append(pkg, aml_int(0));
}
aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
- apic_idx = apic_id + 1;
+ apic_idx = cpu_apic_id + 1;
}
aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
aml_append(ctx, sb_scope);
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index 7d29eb224f..a0d367c60d 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -296,10 +296,9 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
{
const char *r40_nic_models[] = { "gmac", "emac", NULL };
AwR40State *s = AW_R40(dev);
- unsigned i;
/* CPUs */
- for (i = 0; i < AW_R40_NUM_CPUS; i++) {
+ for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) {
/*
* Disable secondary CPUs. Guest EL3 firmware will start
@@ -335,7 +334,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
* maintenance interrupt signal to the appropriate GIC PPI inputs,
* and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
*/
- for (i = 0; i < AW_R40_NUM_CPUS; i++) {
+ for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) {
DeviceState *cpudev = DEVICE(&s->cpus[i]);
int ppibase = AW_R40_GIC_NUM_SPI + i * GIC_INTERNAL + GIC_NR_SGIS;
int irq;
@@ -494,7 +493,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC));
/* Unimplemented devices */
- for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
+ for (unsigned i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
create_unimplemented_device(r40_unimplemented[i].device_name,
r40_unimplemented[i].base,
r40_unimplemented[i].size);
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 11cd08b6c1..31acbf7347 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -1468,7 +1468,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (info->has_cachectrl) {
for (i = 0; i < info->num_cpus; i++) {
char *name = g_strdup_printf("cachectrl%d", i);
- MemoryRegion *mr;
qdev_prop_set_string(DEVICE(&s->cachectrl[i]), "name", name);
g_free(name);
@@ -1484,7 +1483,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (info->has_cpusecctrl) {
for (i = 0; i < info->num_cpus; i++) {
char *name = g_strdup_printf("CPUSECCTRL%d", i);
- MemoryRegion *mr;
qdev_prop_set_string(DEVICE(&s->cpusecctrl[i]), "name", name);
g_free(name);
@@ -1499,7 +1497,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
}
if (info->has_cpuid) {
for (i = 0; i < info->num_cpus; i++) {
- MemoryRegion *mr;
qdev_prop_set_uint32(DEVICE(&s->cpuid[i]), "CPUID", i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpuid[i]), errp)) {
@@ -1512,7 +1509,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
}
if (info->has_cpu_pwrctrl) {
for (i = 0; i < info->num_cpus; i++) {
- MemoryRegion *mr;
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpu_pwrctrl[i]), errp)) {
return;
@@ -1605,7 +1601,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
/* Wire up the splitters for the MPC IRQs */
for (i = 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) {
SplitIRQ *splitter = &s->mpc_irq_splitter[i];
- DeviceState *dev_splitter = DEVICE(splitter);
+ DeviceState *devs = DEVICE(splitter);
if (!object_property_set_int(OBJECT(splitter), "num-lines", 2,
errp)) {
@@ -1617,22 +1613,22 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (i < IOTS_NUM_EXP_MPC) {
/* Splitter input is from GPIO input line */
- s->mpcexp_status_in[i] = qdev_get_gpio_in(dev_splitter, 0);
- qdev_connect_gpio_out(dev_splitter, 0,
+ s->mpcexp_status_in[i] = qdev_get_gpio_in(devs, 0);
+ qdev_connect_gpio_out(devs, 0,
qdev_get_gpio_in_named(dev_secctl,
"mpcexp_status", i));
} else {
/* Splitter input is from our own MPC */
qdev_connect_gpio_out_named(DEVICE(&s->mpc[i - IOTS_NUM_EXP_MPC]),
"irq", 0,
- qdev_get_gpio_in(dev_splitter, 0));
- qdev_connect_gpio_out(dev_splitter, 0,
+ qdev_get_gpio_in(devs, 0));
+ qdev_connect_gpio_out(devs, 0,
qdev_get_gpio_in_named(dev_secctl,
"mpc_status",
i - IOTS_NUM_EXP_MPC));
}
- qdev_connect_gpio_out(dev_splitter, 1,
+ qdev_connect_gpio_out(devs, 1,
qdev_get_gpio_in(DEVICE(&s->mpc_irq_orgate), i));
}
/* Create GPIO inputs which will pass the line state for our
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index bf173b10b8..1f78e18872 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -517,7 +517,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
if (s->enable_bitband) {
Object *obj = OBJECT(&s->bitband[i]);
- SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
+ sbd = SYS_BUS_DEVICE(&s->bitband[i]);
if (!object_property_set_int(obj, "base",
bitband_input_addr[i], errp)) {
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index a8b3a8065a..e122e1c32d 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -388,7 +388,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
- qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
+ irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
}
@@ -413,8 +413,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
- qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- sc->irqmap[ASPEED_DEV_I2C] + i);
+ irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
+ sc->irqmap[ASPEED_DEV_I2C] + i);
/* The AST2600 I2C controller has one IRQ per bus. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
}
@@ -611,8 +611,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
- qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- sc->irqmap[ASPEED_DEV_I3C] + i);
+ irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
+ sc->irqmap[ASPEED_DEV_I3C] + i);
/* The AST2600 I3C controller has one IRQ per bus. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq);
}
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
index 6d1c1edab7..648c2e37a2 100644
--- a/hw/arm/smmuv3-internal.h
+++ b/hw/arm/smmuv3-internal.h
@@ -328,12 +328,9 @@ enum { /* Command completion notification */
#define CMD_TTL(x) extract32((x)->word[2], 8 , 2)
#define CMD_TG(x) extract32((x)->word[2], 10, 2)
#define CMD_STE_RANGE(x) extract32((x)->word[2], 0 , 5)
-#define CMD_ADDR(x) ({ \
- uint64_t high = (uint64_t)(x)->word[3]; \
- uint64_t low = extract32((x)->word[2], 12, 20); \
- uint64_t addr = high << 32 | (low << 12); \
- addr; \
- })
+#define CMD_ADDR(x) \
+ (((uint64_t)((x)->word[3]) << 32) | \
+ ((extract64((x)->word[2], 12, 20)) << 12))
#define SMMU_FEATURE_2LVL_STE (1 << 0)
@@ -533,21 +530,13 @@ typedef struct CD {
#define STE_S2S(x) extract32((x)->word[5], 25, 1)
#define STE_S2R(x) extract32((x)->word[5], 26, 1)
-#define STE_CTXPTR(x) \
- ({ \
- unsigned long addr; \
- addr = (uint64_t)extract32((x)->word[1], 0, 16) << 32; \
- addr |= (uint64_t)((x)->word[0] & 0xffffffc0); \
- addr; \
- })
-
-#define STE_S2TTB(x) \
- ({ \
- unsigned long addr; \
- addr = (uint64_t)extract32((x)->word[7], 0, 16) << 32; \
- addr |= (uint64_t)((x)->word[6] & 0xfffffff0); \
- addr; \
- })
+#define STE_CTXPTR(x) \
+ ((extract64((x)->word[1], 0, 16) << 32) | \
+ ((x)->word[0] & 0xffffffc0))
+
+#define STE_S2TTB(x) \
+ ((extract64((x)->word[7], 0, 16) << 32) | \
+ ((x)->word[6] & 0xfffffff0))
static inline int oas2bits(int oas_field)
{
@@ -585,14 +574,10 @@ static inline int pa_range(STE *ste)
#define CD_VALID(x) extract32((x)->word[0], 31, 1)
#define CD_ASID(x) extract32((x)->word[1], 16, 16)
-#define CD_TTB(x, sel) \
- ({ \
- uint64_t hi, lo; \
- hi = extract32((x)->word[(sel) * 2 + 3], 0, 19); \
- hi <<= 32; \
- lo = (x)->word[(sel) * 2 + 2] & ~0xfULL; \
- hi | lo; \
- })
+#define CD_TTB(x, sel) \
+ ((extract64((x)->word[(sel) * 2 + 3], 0, 19) << 32) | \
+ ((x)->word[(sel) * 2 + 2] & ~0xfULL))
+
#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1)
#define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 1e9be8e89a..6f2b2bd45f 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1040,8 +1040,8 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
SMMUv3State *s = sdev->smmu;
if (!tg) {
- SMMUEventInfo event = {.inval_ste_allowed = true};
- SMMUTransCfg *cfg = smmuv3_get_config(sdev, &event);
+ SMMUEventInfo eventinfo = {.inval_ste_allowed = true};
+ SMMUTransCfg *cfg = smmuv3_get_config(sdev, &eventinfo);
SMMUTransTableInfo *tt;
if (!cfg) {
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8ad78b23c2..15e74249f9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -801,7 +801,6 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
for (i = 0; i < smp_cpus; i++) {
DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
- int irq;
/* Mapping from the output timer irq lines from the CPU to the
* GIC PPI inputs we use for the virt board.
*/
@@ -812,7 +811,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
[GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ,
};
- for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
+ for (unsigned irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
qdev_connect_gpio_out(cpudev, irq,
qdev_get_gpio_in(vms->gic,
ppibase + timer_irq[irq]));
diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c
index 3906b9058b..a07cd7eb5d 100644
--- a/hw/block/xen-block.c
+++ b/hw/block/xen-block.c
@@ -369,7 +369,7 @@ static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name,
case XEN_BLOCK_VDEV_TYPE_XVD:
case XEN_BLOCK_VDEV_TYPE_HD:
case XEN_BLOCK_VDEV_TYPE_SD: {
- char *name = disk_to_vbd_name(vdev->disk);
+ char *vbd_name = disk_to_vbd_name(vdev->disk);
str = g_strdup_printf("%s%s%lu",
(vdev->type == XEN_BLOCK_VDEV_TYPE_XVD) ?
@@ -377,8 +377,8 @@ static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name,
(vdev->type == XEN_BLOCK_VDEV_TYPE_HD) ?
"hd" :
"sd",
- name, vdev->partition);
- g_free(name);
+ vbd_name, vdev->partition);
+ g_free(vbd_name);
break;
}
default:
diff --git a/hw/core/machine.c b/hw/core/machine.c
index cb38b8cf4c..a232ae0bcd 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1082,8 +1082,6 @@ static void machine_initfn(Object *obj)
ms->maxram_size = mc->default_ram_size;
if (mc->nvdimm_supported) {
- Object *obj = OBJECT(ms);
-
ms->nvdimms_state = g_new0(NVDIMMState, 1);
object_property_add_bool(obj, "nvdimm",
machine_get_nvdimm, machine_set_nvdimm);
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 7275d40749..1037c22b2f 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -312,7 +312,6 @@ static void aspeed_i2c_bus_recv(AspeedI2CBus *bus)
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_pool_ctrl, RX_COUNT, i & 0xff);
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, RX_BUFF_EN, 0);
} else if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, RX_DMA_EN)) {
- uint8_t data;
/* In new mode, clear how many bytes we RXed */
if (aspeed_i2c_is_new_mode(bus->controller)) {
ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN_STS, RX_LEN, 0);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4d2d40bab5..95199c8900 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1585,12 +1585,12 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_UID", aml_int(bus_num)));
aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
if (pci_bus_is_cxl(bus)) {
- struct Aml *pkg = aml_package(2);
+ struct Aml *aml_pkg = aml_package(2);
aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0016")));
- aml_append(pkg, aml_eisaid("PNP0A08"));
- aml_append(pkg, aml_eisaid("PNP0A03"));
- aml_append(dev, aml_name_decl("_CID", pkg));
+ aml_append(aml_pkg, aml_eisaid("PNP0A08"));
+ aml_append(aml_pkg, aml_eisaid("PNP0A03"));
+ aml_append(dev, aml_name_decl("_CID", aml_pkg));
build_cxl_osc_method(dev);
} else if (pci_bus_is_express(bus)) {
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
@@ -1783,14 +1783,14 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
Object *pci_host = acpi_get_i386_pci_host();
if (pci_host) {
- PCIBus *bus = PCI_HOST_BRIDGE(pci_host)->bus;
- Aml *scope = aml_scope("PCI0");
+ PCIBus *pbus = PCI_HOST_BRIDGE(pci_host)->bus;
+ Aml *ascope = aml_scope("PCI0");
/* Scan all PCI buses. Generate tables to support hotplug. */
- build_append_pci_bus_devices(scope, bus);
- if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) {
- build_append_pcihp_slots(scope, bus);
+ build_append_pci_bus_devices(ascope, pbus);
+ if (object_property_find(OBJECT(pbus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(ascope, pbus);
}
- aml_append(sb_scope, scope);
+ aml_append(sb_scope, ascope);
}
}
@@ -1842,10 +1842,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
bool has_pcnt;
Object *pci_host = acpi_get_i386_pci_host();
- PCIBus *bus = PCI_HOST_BRIDGE(pci_host)->bus;
+ PCIBus *b = PCI_HOST_BRIDGE(pci_host)->bus;
scope = aml_scope("\\_SB.PCI0");
- has_pcnt = build_append_notfication_callback(scope, bus);
+ has_pcnt = build_append_notfication_callback(scope, b);
if (has_pcnt) {
aml_append(dsdt, scope);
}
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index c0ce896668..2c832ab68b 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3744,7 +3744,7 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus,
/* Unmap the whole range in the notifier's scope. */
static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)
{
- hwaddr size, remain;
+ hwaddr total, remain;
hwaddr start = n->start;
hwaddr end = n->end;
IntelIOMMUState *s = as->iommu_state;
@@ -3765,7 +3765,7 @@ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)
}
assert(start <= end);
- size = remain = end - start + 1;
+ total = remain = end - start + 1;
while (remain >= VTD_PAGE_SIZE) {
IOMMUTLBEvent event;
@@ -3793,10 +3793,10 @@ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)
trace_vtd_as_unmap_whole(pci_bus_num(as->bus),
VTD_PCI_SLOT(as->devfn),
VTD_PCI_FUNC(as->devfn),
- n->start, size);
+ n->start, total);
map.iova = n->start;
- map.size = size - 1; /* Inclusive */
+ map.size = total - 1; /* Inclusive */
iova_tree_remove(as->iova_tree, map);
}
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 5f552b4d37..52e9aca9c6 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -545,10 +545,10 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s, uint32_t devid,
}
if (cmdres == CMD_CONTINUE_OK && cmd == DISCARD) {
- ITEntry ite = {};
+ ITEntry i = {};
/* remove mapping from interrupt translation table */
- ite.valid = false;
- return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STALL;
+ i.valid = false;
+ return update_ite(s, eventid, &dte, &i) ? CMD_CONTINUE_OK : CMD_STALL;
}
return CMD_CONTINUE_OK;
}
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index c757adbe53..a6f91d4bcd 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -610,11 +610,8 @@ static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
case 0x10B0:
case 0x10C0:
case 0x10D0:
- {
- int idx;
- idx = (addr - 0x10A0) >> 4;
- write_IRQreg_ivpr(opp, opp->irq_ipi0 + idx, val);
- }
+ idx = (addr - 0x10A0) >> 4;
+ write_IRQreg_ivpr(opp, opp->irq_ipi0 + idx, val);
break;
case 0x10E0: /* SPVE */
opp->spve = val & opp->vector_mask;
diff --git a/hw/m68k/bootinfo.h b/hw/m68k/bootinfo.h
index a3d37e3c80..0e6e3eea87 100644
--- a/hw/m68k/bootinfo.h
+++ b/hw/m68k/bootinfo.h
@@ -44,15 +44,14 @@
#define BOOTINFOSTR(base, id, string) \
do { \
- int i; \
stw_p(base, id); \
base += 2; \
stw_p(base, \
(sizeof(struct bi_record) + strlen(string) + \
1 /* null termination */ + 3 /* padding */) & ~3); \
base += 2; \
- for (i = 0; string[i]; i++) { \
- stb_p(base++, string[i]); \
+ for (unsigned i_ = 0; string[i_]; i_++) { \
+ stb_p(base++, string[i_]); \
} \
stb_p(base++, 0); \
base = QEMU_ALIGN_PTR_UP(base, 4); \
@@ -60,7 +59,6 @@
#define BOOTINFODATA(base, id, data, len) \
do { \
- int i; \
stw_p(base, id); \
base += 2; \
stw_p(base, \
@@ -69,8 +67,8 @@
base += 2; \
stw_p(base, len); \
base += 2; \
- for (i = 0; i < len; ++i) { \
- stb_p(base++, data[i]); \
+ for (unsigned i_ = 0; i_ < len; ++i_) { \
+ stb_p(base++, data[i_]); \
} \
base = QEMU_ALIGN_PTR_UP(base, 4); \
} while (0)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index ea0fb68cf0..fb7889cf67 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -183,7 +183,7 @@ petalogix_ml605_init(MachineState *machine)
spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
for (i = 0; i < NUM_SPI_FLASHES; i++) {
- DriveInfo *dinfo = drive_get(IF_MTD, 0, i);
+ dinfo = drive_get(IF_MTD, 0, i);
qemu_irq cs_line;
dev = qdev_new("n25q128");
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index 42d4693854..3e4f4b0524 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -534,12 +534,12 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
s->sys_cfgstat |= 2; /* error */
}
} else {
- uint32_t val;
+ uint32_t data;
if (!vexpress_cfgctrl_read(s, dcc, function, site, position,
- device, &val)) {
+ device, &data)) {
s->sys_cfgstat |= 2; /* error */
} else {
- s->sys_cfgdata = val;
+ s->sys_cfgdata = data;
}
}
}
diff --git a/hw/misc/aspeed_i3c.c b/hw/misc/aspeed_i3c.c
index f54f5da522..d1ff617671 100644
--- a/hw/misc/aspeed_i3c.c
+++ b/hw/misc/aspeed_i3c.c
@@ -296,13 +296,13 @@ static void aspeed_i3c_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(&s->iomem_container, 0x0, &s->iomem);
for (i = 0; i < ASPEED_I3C_NR_DEVICES; ++i) {
- Object *dev = OBJECT(&s->devices[i]);
+ Object *i3c_dev = OBJECT(&s->devices[i]);
- if (!object_property_set_uint(dev, "device-id", i, errp)) {
+ if (!object_property_set_uint(i3c_dev, "device-id", i, errp)) {
return;
}
- if (!sysbus_realize(SYS_BUS_DEVICE(dev), errp)) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(i3c_dev), errp)) {
return;
}
diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
index 91383fb097..952a0dc33e 100644
--- a/hw/nios2/10m50_devboard.c
+++ b/hw/nios2/10m50_devboard.c
@@ -98,7 +98,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine)
qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal);
if (nms->vic) {
- DeviceState *dev = qdev_new(TYPE_NIOS2_VIC);
+ dev = qdev_new(TYPE_NIOS2_VIC);
MemoryRegion *dev_mr;
qemu_irq cpu_irq;
@@ -107,7 +107,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine)
cpu_irq = qdev_get_gpio_in_named(DEVICE(cpu), "EIC", 0);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq);
- for (int i = 0; i < 32; i++) {
+ for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(dev, i);
}
diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index 44aba8f4d9..0eabcf5cf5 100644
--- a/hw/nvme/ns.c
+++ b/hw/nvme/ns.c
@@ -107,7 +107,7 @@ static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
ns->pif = ns->params.pif;
- static const NvmeLBAF lbaf[16] = {
+ static const NvmeLBAF defaults[16] = {
[0] = { .ds = 9 },
[1] = { .ds = 9, .ms = 8 },
[2] = { .ds = 9, .ms = 16 },
@@ -120,7 +120,7 @@ static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
ns->nlbaf = 8;
- memcpy(&id_ns->lbaf, &lbaf, sizeof(lbaf));
+ memcpy(&id_ns->lbaf, &defaults, sizeof(defaults));
for (i = 0; i < ns->nlbaf; i++) {
NvmeLBAF *lbaf = &id_ns->lbaf[i];
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index daaa2f0575..26460d210d 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -738,8 +738,9 @@ static void pnv_psi_p9_mmio_write(void *opaque, hwaddr addr,
}
} else {
if (!(psi->regs[reg] & PSIHB9_ESB_CI_VALID)) {
- hwaddr addr = val & ~(PSIHB9_ESB_CI_VALID | PSIHB10_ESB_CI_64K);
- memory_region_add_subregion(sysmem, addr,
+ hwaddr esb_addr =
+ val & ~(PSIHB9_ESB_CI_VALID | PSIHB10_ESB_CI_64K);
+ memory_region_add_subregion(sysmem, esb_addr,
&psi9->source.esb_mmio);
}
}
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 1f1aa2a6d4..d4230d3647 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -780,6 +780,26 @@ static void spapr_dt_cpu(CPUState *cs, void *fdt, int offset,
pcc->lrg_decr_bits)));
}
+static void spapr_dt_one_cpu(void *fdt, SpaprMachineState *spapr, CPUState *cs,
+ int cpus_offset)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ int index = spapr_get_vcpu_id(cpu);
+ DeviceClass *dc = DEVICE_GET_CLASS(cs);
+ g_autofree char *nodename = NULL;
+ int offset;
+
+ if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
+ return;
+ }
+
+ nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
+ offset = fdt_add_subnode(fdt, cpus_offset, nodename);
+ _FDT(offset);
+ spapr_dt_cpu(cs, fdt, offset, spapr);
+}
+
+
static void spapr_dt_cpus(void *fdt, SpaprMachineState *spapr)
{
CPUState **rev;
@@ -809,21 +829,7 @@ static void spapr_dt_cpus(void *fdt, SpaprMachineState *spapr)
}
for (i = n_cpus - 1; i >= 0; i--) {
- CPUState *cs = rev[i];
- PowerPCCPU *cpu = POWERPC_CPU(cs);
- int index = spapr_get_vcpu_id(cpu);
- DeviceClass *dc = DEVICE_GET_CLASS(cs);
- g_autofree char *nodename = NULL;
- int offset;
-
- if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
- continue;
- }
-
- nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
- offset = fdt_add_subnode(fdt, cpus_offset, nodename);
- _FDT(offset);
- spapr_dt_cpu(cs, fdt, offset, spapr);
+ spapr_dt_one_cpu(fdt, spapr, rev[i], cpus_offset);
}
g_free(rev);
@@ -2659,8 +2665,6 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
}
if (smc->pre_2_10_has_unused_icps) {
- int i;
-
for (i = 0; i < spapr_max_server_number(spapr); i++) {
/* Dummy entries get deregistered when real ICPState objects
* are registered during CPU core hotplug.
@@ -3210,8 +3214,8 @@ static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
if (g_str_equal("pci-bridge", qdev_fw_name(dev))) {
/* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
- PCIDevice *pcidev = CAST(PCIDevice, dev, TYPE_PCI_DEVICE);
- return g_strdup_printf("pci@%x", PCI_SLOT(pcidev->devfn));
+ PCIDevice *pdev = CAST(PCIDevice, dev, TYPE_PCI_DEVICE);
+ return g_strdup_printf("pci@%x", PCI_SLOT(pdev->devfn));
}
if (pcidev) {
diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c
index b5c400a94d..2b99d3b4b1 100644
--- a/hw/ppc/spapr_drc.c
+++ b/hw/ppc/spapr_drc.c
@@ -341,7 +341,7 @@ static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
fdt_depth = 0;
do {
- const char *name = NULL;
+ const char *dt_name = NULL;
const struct fdt_property *prop = NULL;
int prop_len = 0, name_len = 0;
uint32_t tag;
@@ -351,8 +351,8 @@ static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
switch (tag) {
case FDT_BEGIN_NODE:
fdt_depth++;
- name = fdt_get_name(fdt, fdt_offset, &name_len);
- if (!visit_start_struct(v, name, NULL, 0, errp)) {
+ dt_name = fdt_get_name(fdt, fdt_offset, &name_len);
+ if (!visit_start_struct(v, dt_name, NULL, 0, errp)) {
return;
}
break;
@@ -369,8 +369,8 @@ static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
case FDT_PROP: {
int i;
prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
- name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
- if (!visit_start_list(v, name, NULL, 0, errp)) {
+ dt_name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+ if (!visit_start_list(v, dt_name, NULL, 0, errp)) {
return;
}
for (i = 0; i < prop_len; i++) {
@@ -1237,8 +1237,6 @@ static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
case FDT_END_NODE:
drc->ccs_depth--;
if (drc->ccs_depth == 0) {
- uint32_t drc_index = spapr_drc_index(drc);
-
/* done sending the device tree, move to configured state */
trace_spapr_drc_set_configured(drc_index);
drc->state = drck->ready_state;
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index ce14959317..370c5a90f2 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1826,9 +1826,9 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
(SpaprMachineState *) object_dynamic_cast(qdev_get_machine(),
TYPE_SPAPR_MACHINE);
SpaprMachineClass *smc = spapr ? SPAPR_MACHINE_GET_CLASS(spapr) : NULL;
- SysBusDevice *s = SYS_BUS_DEVICE(dev);
- SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
- PCIHostState *phb = PCI_HOST_BRIDGE(s);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(sbd);
+ PCIHostState *phb = PCI_HOST_BRIDGE(sbd);
MachineState *ms = MACHINE(spapr);
char *namebuf;
int i;
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 6a2fcc4ade..436503f1ba 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -227,7 +227,7 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
IRQ_M_TIMER));
/* SPI-Hosts */
- for (int i = 0; i < OPENTITAN_NUM_SPI_HOSTS; ++i) {
+ for (i = 0; i < OPENTITAN_NUM_SPI_HOSTS; ++i) {
dev = DEVICE(&(s->spi_host[i]));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi_host[i]), errp)) {
return;
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index b753705856..2a90601ac5 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -1423,13 +1423,14 @@ void smbios_entry_add(QemuOpts *opts, Error **errp)
if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) {
return;
}
- struct type8_instance *t;
- t = g_new0(struct type8_instance, 1);
- save_opt(&t->internal_reference, opts, "internal_reference");
- save_opt(&t->external_reference, opts, "external_reference");
- t->connector_type = qemu_opt_get_number(opts, "connector_type", 0);
- t->port_type = qemu_opt_get_number(opts, "port_type", 0);
- QTAILQ_INSERT_TAIL(&type8, t, next);
+ struct type8_instance *t8_i;
+ t8_i = g_new0(struct type8_instance, 1);
+ save_opt(&t8_i->internal_reference, opts, "internal_reference");
+ save_opt(&t8_i->external_reference, opts, "external_reference");
+ t8_i->connector_type = qemu_opt_get_number(opts,
+ "connector_type", 0);
+ t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0);
+ QTAILQ_INSERT_TAIL(&type8, t8_i, next);
return;
case 11:
if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) {
@@ -1452,27 +1453,27 @@ void smbios_entry_add(QemuOpts *opts, Error **errp)
type17.speed = qemu_opt_get_number(opts, "speed", 0);
return;
case 41: {
- struct type41_instance *t;
+ struct type41_instance *t41_i;
Error *local_err = NULL;
if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) {
return;
}
- t = g_new0(struct type41_instance, 1);
- save_opt(&t->designation, opts, "designation");
- t->kind = qapi_enum_parse(&type41_kind_lookup,
- qemu_opt_get(opts, "kind"),
- 0, &local_err) + 1;
- t->kind |= 0x80; /* enabled */
+ t41_i = g_new0(struct type41_instance, 1);
+ save_opt(&t41_i->designation, opts, "designation");
+ t41_i->kind = qapi_enum_parse(&type41_kind_lookup,
+ qemu_opt_get(opts, "kind"),
+ 0, &local_err) + 1;
+ t41_i->kind |= 0x80; /* enabled */
if (local_err != NULL) {
error_propagate(errp, local_err);
- g_free(t);
+ g_free(t41_i);
return;
}
- t->instance = qemu_opt_get_number(opts, "instance", 1);
- save_opt(&t->pcidev, opts, "pcidev");
+ t41_i->instance = qemu_opt_get_number(opts, "instance", 1);
+ save_opt(&t41_i->pcidev, opts, "pcidev");
- QTAILQ_INSERT_TAIL(&type41, t, next);
+ QTAILQ_INSERT_TAIL(&type41, t41_i, next);
return;
}
default:
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 9c20b3d6ad..72161f07bb 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -167,7 +167,7 @@ static uint64_t calculate_next(struct AspeedTimer *t)
qemu_set_irq(t->irq, t->level);
}
- next = MAX(MAX(calculate_match(t, 0), calculate_match(t, 1)), 0);
+ next = MAX(calculate_match(t, 0), calculate_match(t, 1));
t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
return calculate_time(t, next);