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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-08 02:30:40 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-08 02:30:40 +0000
commitce8198612e08f737057d9984a9fa1bf18af8ce4b (patch)
tree73a22b7f00ad045b102c0dc53df6d6ef20396597 /hw
parent945545501641bad0b650350168e365eff9a3eef3 (diff)
ARM946 CPU support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/pxa2xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 43d40c7fd9..9f4c46c683 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -251,7 +251,7 @@ static void pxa2xx_clkpwr_write(void *opaque, int op2, int reg, int crm,
ARM_CPU_MODE_SVC | CPSR_A | CPSR_F | CPSR_I;
s->env->cp15.c1_sys = 0;
s->env->cp15.c1_coproc = 0;
- s->env->cp15.c2 = 0;
+ s->env->cp15.c2_base = 0;
s->env->cp15.c3 = 0;
s->pm_regs[PSSR >> 2] |= 0x8; /* Set STS */
s->pm_regs[RCSR >> 2] |= 0x8; /* Set GPR */