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authorPeter Maydell <peter.maydell@linaro.org>2014-08-04 15:01:38 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-08-04 15:01:38 +0100
commit69f87f713069f1f70f86cb65883f7d43e3aa21de (patch)
tree816428de782bde87199584b149b74a5203d1d245 /hw
parentcc11a0623ab4b16faa6945f1f6dedcb59f993b61 (diff)
parentdbb1fb277ca12acd577403575aa6a2f119ab79ea (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140804' into staging
target-arm queue: * Set PC correctly when loading AArch64 ELF files * sdhci: Fix ADMA dma_memory_read access * some more foundational work for EL2/EL3 support * fix bugs which reveal themselves if the TARGET_PAGE_SIZE is not set to 1K # gpg: Signature made Mon 04 Aug 2014 14:51:34 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140804: target-arm: A64: fix TLB flush instructions target-arm: don't hardcode mask values in arm_cpu_handle_mmu_fault target-arm: Fix bit test in sp_el0_access target-arm: Add FAR_EL2 and 3 target-arm: Add ESR_EL2 and 3 target-arm: Make far_el1 an array target-arm: A64: Respect SPSEL when taking exceptions target-arm: A64: Respect SPSEL in ERET SP restore target-arm: A64: Break out aarch64_save/restore_sp sd: sdhci: Fix ADMA dma_memory_read access hw/arm/virt: formatting: memory map hw/arm/boot: Set PC correctly when loading AArch64 ELF files Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/boot.c8
-rw-r--r--hw/arm/virt.c16
-rw-r--r--hw/sd/sdhci.c3
3 files changed, 16 insertions, 11 deletions
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 3d1f4a255b..12417617a3 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -417,8 +417,12 @@ static void do_cpu_reset(void *opaque)
if (info) {
if (!info->is_linux) {
/* Jump to the entry point. */
- env->regs[15] = info->entry & 0xfffffffe;
- env->thumb = info->entry & 1;
+ if (env->aarch64) {
+ env->pc = info->entry;
+ } else {
+ env->regs[15] = info->entry & 0xfffffffe;
+ env->thumb = info->entry & 1;
+ }
} else {
if (CPU(cpu) == first_cpu) {
if (env->aarch64) {
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 89532bd786..ba94298555 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -98,17 +98,17 @@ typedef struct VirtBoardInfo {
*/
static const MemMapEntry a15memmap[] = {
/* Space up to 0x8000000 is reserved for a boot ROM */
- [VIRT_FLASH] = { 0, 0x8000000 },
- [VIRT_CPUPERIPHS] = { 0x8000000, 0x20000 },
+ [VIRT_FLASH] = { 0, 0x08000000 },
+ [VIRT_CPUPERIPHS] = { 0x08000000, 0x00020000 },
/* GIC distributor and CPU interfaces sit inside the CPU peripheral space */
- [VIRT_GIC_DIST] = { 0x8000000, 0x10000 },
- [VIRT_GIC_CPU] = { 0x8010000, 0x10000 },
- [VIRT_UART] = { 0x9000000, 0x1000 },
- [VIRT_RTC] = { 0x9010000, 0x1000 },
- [VIRT_MMIO] = { 0xa000000, 0x200 },
+ [VIRT_GIC_DIST] = { 0x08000000, 0x00010000 },
+ [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 },
+ [VIRT_UART] = { 0x09000000, 0x00001000 },
+ [VIRT_RTC] = { 0x09010000, 0x00001000 },
+ [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
/* 0x10000000 .. 0x40000000 reserved for PCI */
- [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
+ [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
};
static const int a15irqmap[] = {
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index b5a9eee3e2..f9fe700add 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -702,7 +702,8 @@ static void sdhci_do_adma(SDHCIState *s)
length -= block_size - begin;
}
dma_memory_read(&address_space_memory, dscr.addr,
- &s->fifo_buffer[begin], s->data_count);
+ &s->fifo_buffer[begin],
+ s->data_count - begin);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
for (n = 0; n < block_size; n++) {