diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-02-20 23:37:21 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-02-20 23:37:21 +0000 |
| commit | 3594c774873fb51fe119c214e78273f43e2556f8 (patch) | |
| tree | 9670a1f980fd80ce86abd2bc0bc799eeabd8e12e /hw | |
| parent | 32801d54654ecfc41ee7b86b90993c0b83c47f7e (diff) | |
Replace TLSZ with TARGET_FMT_lx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/mips_malta.c | 6 | ||||
| -rw-r--r-- | hw/mips_r4k.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 155f5a8182..97431b1e62 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -160,7 +160,7 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) default: #if 0 - printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n", + printf ("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n", addr); #endif break; @@ -244,7 +244,7 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, default: #if 0 - printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n", + printf ("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n", addr); #endif break; @@ -464,7 +464,7 @@ static int64_t load_kernel (CPUState *env) /* Store command line. */ prom_set(index++, env->kernel_filename); if (initrd_size > 0) - prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); + prom_set(index++, "rd_start=0x" TARGET_FMT_lx " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); else prom_set(index++, env->kernel_cmdline); diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 7d3ddd934b..63ad367207 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -103,7 +103,7 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, if (initrd_size > 0) { int ret; ret = sprintf(phys_ram_base + (16 << 20) - 256, - "rd_start=0x" TLSZ " rd_size=%li ", + "rd_start=0x" TARGET_FMT_lx " rd_size=%li ", INITRD_LOAD_ADDR, initrd_size); strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline); |