diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-09-21 21:46:53 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-09-21 21:46:53 +0000 |
| commit | 37dd208d38ab9f65f9e15fd7fe2f0b75bc83220a (patch) | |
| tree | a9c49b957a3dc431a5583bee5799bbf086394cf7 /hw | |
| parent | 05f83f0f950fa1ae412d05670bf8c05adaaccb6b (diff) | |
VBE: 8 bit DACs + support for VBE BIOS IDs (Volker Ruppert)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2163 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/vga.c | 17 | ||||
| -rw-r--r-- | hw/vga_int.h | 3 |
2 files changed, 16 insertions, 4 deletions
@@ -422,7 +422,9 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) case VBE_DISPI_INDEX_ID: if (val == VBE_DISPI_ID0 || val == VBE_DISPI_ID1 || - val == VBE_DISPI_ID2) { + val == VBE_DISPI_ID2 || + val == VBE_DISPI_ID3 || + val == VBE_DISPI_ID4) { s->vbe_regs[s->vbe_index] = val; } break; @@ -505,6 +507,7 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) /* XXX: the bios should do that */ s->bank_offset = 0; } + s->dac_8bit = (val & VBE_DISPI_8BIT_DAC) > 0; s->vbe_regs[s->vbe_index] = val; break; case VBE_DISPI_INDEX_VIRT_WIDTH: @@ -921,9 +924,15 @@ static int update_palette256(VGAState *s) palette = s->last_palette; v = 0; for(i = 0; i < 256; i++) { - col = s->rgb_to_pixel(c6_to_8(s->palette[v]), - c6_to_8(s->palette[v + 1]), - c6_to_8(s->palette[v + 2])); + if (s->dac_8bit) { + col = s->rgb_to_pixel(s->palette[v], + s->palette[v + 1], + s->palette[v + 2]); + } else { + col = s->rgb_to_pixel(c6_to_8(s->palette[v]), + c6_to_8(s->palette[v + 1]), + c6_to_8(s->palette[v + 2])); + } if (col != palette[i]) { full_update = 1; palette[i] = col; diff --git a/hw/vga_int.h b/hw/vga_int.h index 70127768a4..633f344c73 100644 --- a/hw/vga_int.h +++ b/hw/vga_int.h @@ -49,6 +49,8 @@ #define VBE_DISPI_ID0 0xB0C0 #define VBE_DISPI_ID1 0xB0C1 #define VBE_DISPI_ID2 0xB0C2 +#define VBE_DISPI_ID3 0xB0C3 +#define VBE_DISPI_ID4 0xB0C4 #define VBE_DISPI_DISABLED 0x00 #define VBE_DISPI_ENABLED 0x01 @@ -103,6 +105,7 @@ uint8_t dac_read_index; \ uint8_t dac_write_index; \ uint8_t dac_cache[3]; /* used when writing */ \ + int dac_8bit; \ uint8_t palette[768]; \ int32_t bank_offset; \ int (*get_bpp)(struct VGAState *s); \ |