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authorAndreas Färber <afaerber@suse.de>2012-05-14 00:08:10 +0200
committerAndreas Färber <afaerber@suse.de>2012-06-11 00:23:04 +0200
commit9543b0cdd64ac0ba109b92eaf00e458b6223a6a8 (patch)
treec5e2daa1c8589115b23f6157ecc4a71e4ee7e697 /hw
parent20e93374e902450fa90ddd30eb4bf7d46da9ab76 (diff)
arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()
Adapt exynos4210 and highbank accordingly. The parameter itself is unused. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
Diffstat (limited to 'hw')
-rw-r--r--hw/arm-misc.h2
-rw-r--r--hw/arm_boot.c6
-rw-r--r--hw/exynos4210.c2
-rw-r--r--hw/exynos4210.h2
-rw-r--r--hw/highbank.c2
5 files changed, 7 insertions, 7 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 2f46e214cf..320033dba5 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -50,7 +50,7 @@ struct arm_boot_info {
* perform any necessary CPU reset handling and set the PC for thei
* secondary CPUs to point at this boot blob.
*/
- void (*write_secondary_boot)(CPUARMState *env,
+ void (*write_secondary_boot)(ARMCPU *cpu,
const struct arm_boot_info *info);
void (*secondary_cpu_reset_hook)(CPUARMState *env,
const struct arm_boot_info *info);
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index eb2d1760b0..4955f019a8 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -59,7 +59,7 @@ static uint32_t smpboot[] = {
0 /* bootreg: Boot register address is held here */
};
-static void default_write_secondary(CPUARMState *env,
+static void default_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
int n;
@@ -303,7 +303,7 @@ static void do_cpu_reset(void *opaque)
void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
{
- ARMCPU *cpu;
+ ARMCPU *cpu = arm_env_get_cpu(env);
int kernel_size;
int initrd_size;
int n;
@@ -402,7 +402,7 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
info->loader_start);
if (info->nb_cpus > 1) {
- info->write_secondary_boot(env, info);
+ info->write_secondary_boot(cpu, info);
}
}
info->is_linux = is_linux;
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index afc4bdc7e0..ae53837644 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -65,7 +65,7 @@
static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
0x09, 0x00, 0x00, 0x00 };
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
int n;
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index f7c7027302..b520676c62 100644
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -97,7 +97,7 @@ typedef struct Exynos4210State {
MemoryRegion bootreg_mem;
} Exynos4210State;
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);
Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
diff --git a/hw/highbank.c b/hw/highbank.c
index 4d6d728a28..45ca1ad757 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -36,7 +36,7 @@
/* Board init. */
-static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info)
+static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
{
int n;
uint32_t smpboot[] = {