diff options
author | Alistair Francis <alistair.francis@xilinx.com> | 2018-01-22 11:43:38 -0800 |
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committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-01-26 11:09:09 +0100 |
commit | 633a91b687823b84c37d754b876e96ec9b1dc296 (patch) | |
tree | 6013c90df96816c747d3118faf207f2e283735cb /hw | |
parent | c859b566e8ceba48c4314e7123f7480e4eb66ff2 (diff) |
xlnx-zynqmp-pmu: Connect the PMU interrupt controller
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/microblaze/xlnx-zynqmp-pmu.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 145837b372..7312bfe23e 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -24,6 +24,8 @@ #include "cpu.h" #include "boot.h" +#include "hw/intc/xlnx-pmu-iomod-intc.h" + /* Define the PMU device */ #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" @@ -34,14 +36,18 @@ #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 #define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000 +#define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000 + typedef struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; /*< public >*/ MicroBlazeCPU cpu; + XlnxPMUIOIntc intc; } XlnxZynqMPPMUSoCState; + static void xlnx_zynqmp_pmu_soc_init(Object *obj) { XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); @@ -50,6 +56,9 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) TYPE_MICROBLAZE_CPU); object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu), &error_abort); + + object_initialize(&s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC); + qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default()); } static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) @@ -80,6 +89,21 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } + + object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size", + &error_abort); + object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge", + &error_abort); + object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive", + &error_abort); + object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0, + qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ)); } static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) |